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[16/40] dt-bindings: pinctrl: qcom,msm8996: simplify with unevaluatedProperties

Message ID 20230407184546.161168-16-krzysztof.kozlowski@linaro.org
State Accepted
Commit 9de7c1721696af6387dc27661f957c58400ef763
Headers show
Series [01/40] dt-bindings: pinctrl: qcom,ipq5332-tlmm: simplify with unevaluatedProperties | expand

Commit Message

Krzysztof Kozlowski April 7, 2023, 6:45 p.m. UTC 
All Qualcomm SoC Top Level Mode Multiplexer pin controllers have similar
capabilities regarding pin properties, thus we can just accept entire
set provided by qcom,tlmm-common.yaml schema.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
 .../bindings/pinctrl/qcom,msm8996-pinctrl.yaml        | 11 +----------
 1 file changed, 1 insertion(+), 10 deletions(-)
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Patch

diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,msm8996-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,msm8996-pinctrl.yaml
index 047b4584e3c0..59d406b60957 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,msm8996-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,msm8996-pinctrl.yaml
@@ -53,6 +53,7 @@  $defs:
       Pinctrl node's client devices use subnodes for desired pin configuration.
       Client device subnodes use below standard properties.
     $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
+    unevaluatedProperties: false
 
     properties:
       pins:
@@ -122,19 +123,9 @@  $defs:
                 modem_tsync, nav_dr, nav_pps, pci_e1, gsm_tx, qspi_cs, ssbi2,
                 ssbi1, mss_lte, qspi_clk, qspi0, qspi1, qspi2, qspi3 ]
 
-      bias-pull-down: true
-      bias-pull-up: true
-      bias-disable: true
-      drive-strength: true
-      input-enable: true
-      output-high: true
-      output-low: true
-
     required:
       - pins
 
-    additionalProperties: false
-
 allOf:
   - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#