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AJvYcCV52Y16zkUxvvR4kFZGJoAniNW7BQfBeaeob5f2IAdS87AxSUdetVCAzmSgVJrbSCBJZr0f2Tx/11I5NuRFd5JTbWAk02TcDIlQp9C3OP6iiQ2p+3ansNvrLZYEi9GzPkDoOBqPOPV40zvDDXO5pD4C/iZAmrT+QsxzDb9peezI3yj1Ew8= X-Gm-Message-State: AOJu0YyGb4ataGUtivsbCGNDzapcoRrPb+225EuB1RR+SxYUIlHmVLP3 Kof72MtEPLaaOb10U6C1eCbgUkUjrnq/o8up0gru+laOFnmCmwWu X-Google-Smtp-Source: AGHT+IHNJXnk4Rb+kaIaJJ+gRnAXbAhv2vuLHJntLquc7vC7kHATLeErtiNu0Kn1h5Z4T7ckZVFdGQ== X-Received: by 2002:adf:f412:0:b0:33d:64c7:5619 with SMTP id g18-20020adff412000000b0033d64c75619mr2673028wro.70.1711492209711; Tue, 26 Mar 2024 15:30:09 -0700 (PDT) Received: from prasmi.home ([2a00:23c8:2500:a01:90ec:252a:cdf5:54e9]) by smtp.gmail.com with ESMTPSA id bs20-20020a056000071400b00341de138a2esm600647wrb.94.2024.03.26.15.30.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 Mar 2024 15:30:09 -0700 (PDT) From: Prabhakar X-Google-Original-From: Prabhakar To: Geert Uytterhoeven , Linus Walleij , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Magnus Damm Cc: linux-renesas-soc@vger.kernel.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Prabhakar , Fabrizio Castro , Lad Prabhakar Subject: [RFC PATCH 09/13] pinctrl: renesas: pinctrl-rzg2l: Add function pointer for writing to PMC register Date: Tue, 26 Mar 2024 22:28:40 +0000 Message-Id: <20240326222844.1422948-10-prabhakar.mahadev-lad.rj@bp.renesas.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240326222844.1422948-1-prabhakar.mahadev-lad.rj@bp.renesas.com> References: <20240326222844.1422948-1-prabhakar.mahadev-lad.rj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Lad Prabhakar This patch introduces a function pointer, pmc_writeb(), in the struct rzg2l_pinctrl_data to facilitate writing to the PMC register. On the RZ/V2H(P) SoC, unlocking the PWPR.REGWE_A bit before writing to PMC registers is required, whereas this is not the case for the existing RZ/G2L family. This addition enables the reuse of existing code for RZ/V2H(P). Additionally, this patch populates this function pointer with appropriate data for existing SoCs. Note that this functionality is only handled in rzg2l_gpio_request(), as PMC unlock/lock during PFC setup will be taken care of in the set_pfc_mode/pm_set_pfc callbacks. Signed-off-by: Lad Prabhakar --- drivers/pinctrl/renesas/pinctrl-rzg2l.c | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/drivers/pinctrl/renesas/pinctrl-rzg2l.c b/drivers/pinctrl/renesas/pinctrl-rzg2l.c index 4cdebdbd8a04..3de97d5e198a 100644 --- a/drivers/pinctrl/renesas/pinctrl-rzg2l.c +++ b/drivers/pinctrl/renesas/pinctrl-rzg2l.c @@ -260,6 +260,7 @@ struct rzg2l_pinctrl_data { unsigned int n_variable_pin_cfg; void (*set_pfc_mode)(struct rzg2l_pinctrl *pctrl, u8 pin, u8 off, u8 func); void (*pm_set_pfc)(struct rzg2l_pinctrl *pctrl); + void (*pmc_writeb)(struct rzg2l_pinctrl *pctrl, u8 val, void __iomem *addr); }; /** @@ -463,6 +464,11 @@ static const struct rzg2l_variable_pin_cfg r9a07g043f_variable_pin_cfg[] = { }; #endif +static void rzg2l_pmc_writeb(struct rzg2l_pinctrl *pctrl, u8 val, void __iomem *addr) +{ + writeb(val, addr); +} + static void rzg2l_pinctrl_set_pfc_mode(struct rzg2l_pinctrl *pctrl, u8 pin, u8 off, u8 func) { @@ -1413,7 +1419,7 @@ static int rzg2l_gpio_request(struct gpio_chip *chip, unsigned int offset) /* Select GPIO mode in PMC Register */ reg8 = readb(pctrl->base + PMC(off)); reg8 &= ~BIT(bit); - writeb(reg8, pctrl->base + PMC(off)); + pctrl->data->pmc_writeb(pctrl, reg8, pctrl->base + PMC(off)); spin_unlock_irqrestore(&pctrl->lock, flags); @@ -2678,6 +2684,7 @@ static struct rzg2l_pinctrl_data r9a07g043_data = { #endif .set_pfc_mode = &rzg2l_pinctrl_set_pfc_mode, .pm_set_pfc = &rzg2l_pinctrl_pm_setup_pfc, + .pmc_writeb = &rzg2l_pmc_writeb, }; static struct rzg2l_pinctrl_data r9a07g044_data = { @@ -2691,6 +2698,7 @@ static struct rzg2l_pinctrl_data r9a07g044_data = { .hwcfg = &rzg2l_hwcfg, .set_pfc_mode = &rzg2l_pinctrl_set_pfc_mode, .pm_set_pfc = &rzg2l_pinctrl_pm_setup_pfc, + .pmc_writeb = &rzg2l_pmc_writeb, }; static struct rzg2l_pinctrl_data r9a08g045_data = { @@ -2703,6 +2711,7 @@ static struct rzg2l_pinctrl_data r9a08g045_data = { .hwcfg = &rzg3s_hwcfg, .set_pfc_mode = &rzg2l_pinctrl_set_pfc_mode, .pm_set_pfc = &rzg2l_pinctrl_pm_setup_pfc, + .pmc_writeb = &rzg2l_pmc_writeb, }; static const struct of_device_id rzg2l_pinctrl_of_table[] = {