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AJvYcCV/fpq4s2vjnI4gxaL2UUKCSZI858o/xJusDY3/+rE6FwRj6UhFz5TggahBZyQOWQO5Qp10Om5b8dxEVCvVUjjsCFHuLAyCu5v5SxiBuQwekNi27sXj0AHaYMarwR64AUITz1aGlhyhpo1SSZa4DH5qj42N3n7lgMAfmElRbu8ieM4ASKU= X-Gm-Message-State: AOJu0Yw1eK+gl6o1kPWQijHxupYRQ668LpXfw0a1wQL//BcWcbPMIP/W M+FU0uRipzidvHd8TDfPlHYUlghZsK8q8FaCeB6UArHQDusPJM4= X-Google-Smtp-Source: AGHT+IGL0AAzW6gi5FMaOnf2+t1zcD1sVS1LK3XSrI0v4R9xqr0sQMPNnWO6PLsnDB2l3FxArGL2wA== X-Received: by 2002:a2e:999a:0:b0:2d8:781c:7ba1 with SMTP id w26-20020a2e999a000000b002d8781c7ba1mr9244034lji.7.1713283975689; Tue, 16 Apr 2024 09:12:55 -0700 (PDT) Received: from U4.lan ([91.66.160.190]) by smtp.gmail.com with ESMTPSA id t7-20020adfe447000000b00343eac2acc4sm15350743wrm.111.2024.04.16.09.12.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Apr 2024 09:12:55 -0700 (PDT) From: Alex Bee To: Lee Jones , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Linus Walleij , Liam Girdwood , Mark Brown , Sebastian Reichel Cc: Chris Zhong , Zhang Qing , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, Alex Bee Subject: [PATCH v4 3/5] pinctrl: rk805: Add rk816 pinctrl support Date: Tue, 16 Apr 2024 18:12:35 +0200 Message-ID: <20240416161237.2500037-4-knaerzche@gmail.com> X-Mailer: git-send-email 2.43.2 In-Reply-To: <20240416161237.2500037-1-knaerzche@gmail.com> References: <20240416161237.2500037-1-knaerzche@gmail.com> Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 This adds support for RK816 to the exising rk805 pinctrl driver It has a single pin which can be configured as input from a thermistor (for instance in an attached battery) or as a gpio. Signed-off-by: Alex Bee Reviewed-by: Linus Walleij --- changes since v1: - rename pin-function names according to the updated binding - added missing fun_reg for rk816_gpio_cfgs changes since v2: - aligned pin-function names with binding (dropped "pin_fun"-prefix) drivers/pinctrl/pinctrl-rk805.c | 69 +++++++++++++++++++++++++++++++++ 1 file changed, 69 insertions(+) diff --git a/drivers/pinctrl/pinctrl-rk805.c b/drivers/pinctrl/pinctrl-rk805.c index 56d916f2cee6..c42f1bf93404 100644 --- a/drivers/pinctrl/pinctrl-rk805.c +++ b/drivers/pinctrl/pinctrl-rk805.c @@ -93,6 +93,11 @@ enum rk806_pinmux_option { RK806_PINMUX_FUN5, }; +enum rk816_pinmux_option { + RK816_PINMUX_THERMISTOR, + RK816_PINMUX_GPIO, +}; + enum { RK805_GPIO0, RK805_GPIO1, @@ -104,6 +109,10 @@ enum { RK806_GPIO_DVS3 }; +enum { + RK816_GPIO0, +}; + static const char *const rk805_gpio_groups[] = { "gpio0", "gpio1", @@ -115,6 +124,10 @@ static const char *const rk806_gpio_groups[] = { "gpio_pwrctrl3", }; +static const char *const rk816_gpio_groups[] = { + "gpio0", +}; + /* RK805: 2 output only GPIOs */ static const struct pinctrl_pin_desc rk805_pins_desc[] = { PINCTRL_PIN(RK805_GPIO0, "gpio0"), @@ -128,6 +141,11 @@ static const struct pinctrl_pin_desc rk806_pins_desc[] = { PINCTRL_PIN(RK806_GPIO_DVS3, "gpio_pwrctrl3"), }; +/* RK816 */ +static const struct pinctrl_pin_desc rk816_pins_desc[] = { + PINCTRL_PIN(RK816_GPIO0, "gpio0"), +}; + static const struct rk805_pin_function rk805_pin_functions[] = { { .name = "gpio", @@ -176,6 +194,21 @@ static const struct rk805_pin_function rk806_pin_functions[] = { }, }; +static const struct rk805_pin_function rk816_pin_functions[] = { + { + .name = "gpio", + .groups = rk816_gpio_groups, + .ngroups = ARRAY_SIZE(rk816_gpio_groups), + .mux_option = RK816_PINMUX_GPIO, + }, + { + .name = "thermistor", + .groups = rk816_gpio_groups, + .ngroups = ARRAY_SIZE(rk816_gpio_groups), + .mux_option = RK816_PINMUX_THERMISTOR, + }, +}; + static const struct rk805_pin_group rk805_pin_groups[] = { { .name = "gpio0", @@ -207,6 +240,14 @@ static const struct rk805_pin_group rk806_pin_groups[] = { } }; +static const struct rk805_pin_group rk816_pin_groups[] = { + { + .name = "gpio0", + .pins = { RK816_GPIO0 }, + .npins = 1, + }, +}; + #define RK805_GPIO0_VAL_MSK BIT(0) #define RK805_GPIO1_VAL_MSK BIT(1) @@ -255,6 +296,20 @@ static struct rk805_pin_config rk806_gpio_cfgs[] = { } }; +#define RK816_FUN_MASK BIT(2) +#define RK816_VAL_MASK BIT(3) +#define RK816_DIR_MASK BIT(4) + +static struct rk805_pin_config rk816_gpio_cfgs[] = { + { + .fun_reg = RK818_IO_POL_REG, + .fun_msk = RK816_FUN_MASK, + .reg = RK818_IO_POL_REG, + .val_msk = RK816_VAL_MASK, + .dir_msk = RK816_DIR_MASK, + }, +}; + /* generic gpio chip */ static int rk805_gpio_get(struct gpio_chip *chip, unsigned int offset) { @@ -439,6 +494,8 @@ static int rk805_pinctrl_gpio_request_enable(struct pinctrl_dev *pctldev, return _rk805_pinctrl_set_mux(pctldev, offset, RK805_PINMUX_GPIO); case RK806_ID: return _rk805_pinctrl_set_mux(pctldev, offset, RK806_PINMUX_FUN5); + case RK816_ID: + return _rk805_pinctrl_set_mux(pctldev, offset, RK816_PINMUX_GPIO); } return -ENOTSUPP; @@ -588,6 +645,18 @@ static int rk805_pinctrl_probe(struct platform_device *pdev) pci->pin_cfg = rk806_gpio_cfgs; pci->gpio_chip.ngpio = ARRAY_SIZE(rk806_gpio_cfgs); break; + case RK816_ID: + pci->pins = rk816_pins_desc; + pci->num_pins = ARRAY_SIZE(rk816_pins_desc); + pci->functions = rk816_pin_functions; + pci->num_functions = ARRAY_SIZE(rk816_pin_functions); + pci->groups = rk816_pin_groups; + pci->num_pin_groups = ARRAY_SIZE(rk816_pin_groups); + pci->pinctrl_desc.pins = rk816_pins_desc; + pci->pinctrl_desc.npins = ARRAY_SIZE(rk816_pins_desc); + pci->pin_cfg = rk816_gpio_cfgs; + pci->gpio_chip.ngpio = ARRAY_SIZE(rk816_gpio_cfgs); + break; default: dev_err(&pdev->dev, "unsupported RK805 ID %lu\n", pci->rk808->variant);