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Fri, 14 Feb 2025 15:12:47 -0800 (PST) Received: from [192.168.1.140] ([85.235.12.238]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-5452f676aa5sm158515e87.50.2025.02.14.15.12.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 14 Feb 2025 15:12:47 -0800 (PST) From: Linus Walleij Date: Sat, 15 Feb 2025 00:12:45 +0100 Subject: [PATCH v2 1/2] gpio: mmio: Add flag for calling pinctrl back-end Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250215-vf610-mmio-v2-1-4a91f8c8e8d5@linaro.org> References: <20250215-vf610-mmio-v2-0-4a91f8c8e8d5@linaro.org> In-Reply-To: <20250215-vf610-mmio-v2-0-4a91f8c8e8d5@linaro.org> To: Johan Korsnes , Bough Chen , Bartosz Golaszewski , imx@lists.linux.dev Cc: linux-gpio@vger.kernel.org, Linus Walleij X-Mailer: b4 0.14.2 It turns out that with this flag we can switch over an entire driver to use gpio-mmio instead of a bunch of custom code, also providing get/set_multiple() to it in the process, so it seems like a reasonable feature to add. The generic pin control backend requires us to call the gpiochip_generic_request(), gpiochip_generic_free(), pinctrl_gpio_direction_output() and pinctrl_gpio_direction_input() callbacks, so if the new flag for a pin control back-end is set, we make sure these functions get called as expected. Signed-off-by: Linus Walleij --- drivers/gpio/gpio-mmio.c | 36 ++++++++++++++++++++++++++++-------- include/linux/gpio/driver.h | 3 +++ 2 files changed, 31 insertions(+), 8 deletions(-) diff --git a/drivers/gpio/gpio-mmio.c b/drivers/gpio/gpio-mmio.c index d89e78f0ead31f30c014b201cca4e32ecb377118..d4f72a0f6ed89878d64055ab28d888a7be08b126 100644 --- a/drivers/gpio/gpio-mmio.c +++ b/drivers/gpio/gpio-mmio.c @@ -49,6 +49,7 @@ o ` ~~~~\___/~~~~ ` controller in FPGA is ,.` #include #include #include +#include #include #include #include @@ -323,9 +324,19 @@ static void bgpio_set_multiple_with_clear(struct gpio_chip *gc, gc->write_reg(gc->reg_clr, clear_mask); } +static int bgpio_dir_return(struct gpio_chip *gc, unsigned int gpio, bool dir_out) +{ + if (!gc->bgpio_pinctrl) + return 0; + if (dir_out) + return pinctrl_gpio_direction_output(gc, gpio); + else + return pinctrl_gpio_direction_input(gc, gpio); +} + static int bgpio_simple_dir_in(struct gpio_chip *gc, unsigned int gpio) { - return 0; + return bgpio_dir_return(gc, gpio, false); } static int bgpio_dir_out_err(struct gpio_chip *gc, unsigned int gpio, @@ -339,7 +350,7 @@ static int bgpio_simple_dir_out(struct gpio_chip *gc, unsigned int gpio, { gc->set(gc, gpio, val); - return 0; + return bgpio_dir_return(gc, gpio, true); } static int bgpio_dir_in(struct gpio_chip *gc, unsigned int gpio) @@ -357,7 +368,7 @@ static int bgpio_dir_in(struct gpio_chip *gc, unsigned int gpio) raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags); - return 0; + return bgpio_dir_return(gc, gpio, false); } static int bgpio_get_dir(struct gpio_chip *gc, unsigned int gpio) @@ -403,7 +414,7 @@ static int bgpio_dir_out_dir_first(struct gpio_chip *gc, unsigned int gpio, { bgpio_dir_out(gc, gpio, val); gc->set(gc, gpio, val); - return 0; + return bgpio_dir_return(gc, gpio, true); } static int bgpio_dir_out_val_first(struct gpio_chip *gc, unsigned int gpio, @@ -411,7 +422,7 @@ static int bgpio_dir_out_val_first(struct gpio_chip *gc, unsigned int gpio, { gc->set(gc, gpio, val); bgpio_dir_out(gc, gpio, val); - return 0; + return bgpio_dir_return(gc, gpio, true); } static int bgpio_setup_accessors(struct device *dev, @@ -562,10 +573,13 @@ static int bgpio_setup_direction(struct gpio_chip *gc, static int bgpio_request(struct gpio_chip *chip, unsigned gpio_pin) { - if (gpio_pin < chip->ngpio) - return 0; + if (gpio_pin >= chip->ngpio) + return -EINVAL; - return -EINVAL; + if (chip->bgpio_pinctrl) + return gpiochip_generic_request(chip, gpio_pin); + + return 0; } /** @@ -632,6 +646,12 @@ int bgpio_init(struct gpio_chip *gc, struct device *dev, if (ret) return ret; + if (flags & BGPIOF_PINCTRL_BACKEND) { + gc->bgpio_pinctrl = true; + /* Currently this callback is only used for pincontrol */ + gc->free = gpiochip_generic_free; + } + gc->bgpio_data = gc->read_reg(gc->reg_dat); if (gc->set == bgpio_set_set && !(flags & BGPIOF_UNREADABLE_REG_SET)) diff --git a/include/linux/gpio/driver.h b/include/linux/gpio/driver.h index 2dd7cb9cc270a68ddedbcdd5d44e0d0f88dfa785..e867d52daaf26827324f9e17b5c19c55978ed7e7 100644 --- a/include/linux/gpio/driver.h +++ b/include/linux/gpio/driver.h @@ -394,6 +394,7 @@ struct gpio_irq_chip { * @reg_dir_in: direction in setting register for generic GPIO * @bgpio_dir_unreadable: indicates that the direction register(s) cannot * be read and we need to rely on out internal state tracking. + * @bgpio_pinctrl: the generic GPIO uses a pin control backend. * @bgpio_bits: number of register bits used for a generic GPIO i.e. * * 8 * @bgpio_lock: used to lock chip->bgpio_data. Also, this is needed to keep @@ -478,6 +479,7 @@ struct gpio_chip { void __iomem *reg_dir_out; void __iomem *reg_dir_in; bool bgpio_dir_unreadable; + bool bgpio_pinctrl; int bgpio_bits; raw_spinlock_t bgpio_lock; unsigned long bgpio_data; @@ -713,6 +715,7 @@ int bgpio_init(struct gpio_chip *gc, struct device *dev, #define BGPIOF_READ_OUTPUT_REG_SET BIT(4) /* reg_set stores output value */ #define BGPIOF_NO_OUTPUT BIT(5) /* only input */ #define BGPIOF_NO_SET_ON_INPUT BIT(6) +#define BGPIOF_PINCTRL_BACKEND BIT(7) /* Call pinctrl direction setters */ #ifdef CONFIG_GPIOLIB_IRQCHIP int gpiochip_irqchip_add_domain(struct gpio_chip *gc,