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Tue, 10 Jun 2025 05:58:55 -0700 (PDT) Received: from [127.0.1.1] ([2a01:cb1d:dc:7e00:4d:e52b:812d:eb7c]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-45209ce17f9sm143671135e9.11.2025.06.10.05.58.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 10 Jun 2025 05:58:55 -0700 (PDT) From: Bartosz Golaszewski Date: Tue, 10 Jun 2025 14:58:49 +0200 Subject: [PATCH 3/4] pinctrl: intel: use new GPIO line value setter callbacks Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250610-gpiochip-set-rv-pinctrl-intel-v1-3-d7a773ff864e@linaro.org> References: <20250610-gpiochip-set-rv-pinctrl-intel-v1-0-d7a773ff864e@linaro.org> In-Reply-To: <20250610-gpiochip-set-rv-pinctrl-intel-v1-0-d7a773ff864e@linaro.org> To: Mika Westerberg , Andy Shevchenko , Linus Walleij , Bartosz Golaszewski Cc: linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, Bartosz Golaszewski X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; 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a=openpgp; fpr=169DEB6C0BC3C46013D2C79F11A72EA01471D772 From: Bartosz Golaszewski struct gpio_chip now has callbacks for setting line values that return an integer, allowing to indicate failures. Convert the driver to using them. Signed-off-by: Bartosz Golaszewski --- drivers/pinctrl/intel/pinctrl-intel.c | 19 +++++++++++++------ 1 file changed, 13 insertions(+), 6 deletions(-) diff --git a/drivers/pinctrl/intel/pinctrl-intel.c b/drivers/pinctrl/intel/pinctrl-intel.c index d889c7c878e2d57eb075f4147a3eb2e2ae05ec5b..846b25ed1cc44cf9549aafc63192c80d8e66a797 100644 --- a/drivers/pinctrl/intel/pinctrl-intel.c +++ b/drivers/pinctrl/intel/pinctrl-intel.c @@ -1033,8 +1033,8 @@ static int intel_gpio_get(struct gpio_chip *chip, unsigned int offset) return !!(padcfg0 & PADCFG0_GPIORXSTATE); } -static void intel_gpio_set(struct gpio_chip *chip, unsigned int offset, - int value) +static int intel_gpio_set(struct gpio_chip *chip, unsigned int offset, + int value) { struct intel_pinctrl *pctrl = gpiochip_get_data(chip); void __iomem *reg; @@ -1043,11 +1043,11 @@ static void intel_gpio_set(struct gpio_chip *chip, unsigned int offset, pin = intel_gpio_to_pin(pctrl, offset, NULL, NULL); if (pin < 0) - return; + return -EINVAL; reg = intel_get_padcfg(pctrl, pin, PADCFG0); if (!reg) - return; + return -EINVAL; guard(raw_spinlock_irqsave)(&pctrl->lock); @@ -1057,6 +1057,8 @@ static void intel_gpio_set(struct gpio_chip *chip, unsigned int offset, else padcfg0 &= ~PADCFG0_GPIOTXSTATE; writel(padcfg0, reg); + + return 0; } static int intel_gpio_get_direction(struct gpio_chip *chip, unsigned int offset) @@ -1094,7 +1096,12 @@ static int intel_gpio_direction_input(struct gpio_chip *chip, unsigned int offse static int intel_gpio_direction_output(struct gpio_chip *chip, unsigned int offset, int value) { - intel_gpio_set(chip, offset, value); + int ret; + + ret = intel_gpio_set(chip, offset, value); + if (ret) + return ret; + return pinctrl_gpio_direction_output(chip, offset); } @@ -1106,7 +1113,7 @@ static const struct gpio_chip intel_gpio_chip = { .direction_input = intel_gpio_direction_input, .direction_output = intel_gpio_direction_output, .get = intel_gpio_get, - .set = intel_gpio_set, + .set_rv = intel_gpio_set, .set_config = gpiochip_generic_config, };