From patchwork Tue Nov 22 04:41:40 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhangfei Gao X-Patchwork-Id: 83329 Delivered-To: patch@linaro.org Received: by 10.140.97.165 with SMTP id m34csp1915656qge; Mon, 21 Nov 2016 20:42:27 -0800 (PST) X-Received: by 10.99.184.2 with SMTP id p2mr38614984pge.98.1479789747635; Mon, 21 Nov 2016 20:42:27 -0800 (PST) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id j11si26330380pga.164.2016.11.21.20.42.27; Mon, 21 Nov 2016 20:42:27 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-i2c-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org; spf=pass (google.com: best guess record for domain of linux-i2c-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-i2c-owner@vger.kernel.org; dmarc=fail (p=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754957AbcKVEm0 (ORCPT + 1 other); Mon, 21 Nov 2016 23:42:26 -0500 Received: from mail-pf0-f175.google.com ([209.85.192.175]:33983 "EHLO mail-pf0-f175.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754871AbcKVEmZ (ORCPT ); Mon, 21 Nov 2016 23:42:25 -0500 Received: by mail-pf0-f175.google.com with SMTP id c4so1825423pfb.1 for ; Mon, 21 Nov 2016 20:42:25 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=QIMU6CPmDstUUfFXW9SxkAMZ3qKyNumogencXlOgh1M=; b=coW1/8AkxQ5KgoJCbF0JIJ2g50mi5SIj1fRwolS/t5JsiZmeCkrX5ixtw+ql9MUE/2 Bkte/VmLvIXSXvkKZL/PUaVlZzOXScT7P85q+7O8Z5E5osI7Vwz6vbIfmFbIntkOxQfe 6Cr02iAt4yNCUfl7G1rM6KD5qCbdv3c9YyX2M= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=QIMU6CPmDstUUfFXW9SxkAMZ3qKyNumogencXlOgh1M=; b=WHmo9dI3Qv8kQsdWOSHN881sGA5xKBe3UPAQIHrZiN8aU4nn+B7nUhJIwuVsziD+t/ Ugfntlvn0dbC/QXjGCKwogo+bBIGOhvs13vZVI0157qKK1Dv+Y1lXIWUbnvCORK0kVP8 v6e7Y8DlHt3mrPl9vVVSywuAn4jQdFOgaRdbZ/oeRMhT7N95YrcBCJ9A51Xy872O32A/ y/nKArcwCsIJzt/oQahTCVTxOgCk990YgczB40MeaEXqOcOoYgCGF6L+S/A/alqEzBdl vgj3kGdq2tGzP37Yk/4imfh53E8AZDbpc31x28uM0s0yRlle6UX60/G5twxtzMjsBYsb SIIA== X-Gm-Message-State: AKaTC01QgE6UFtOMLZDvmYts9XnKesTKp7ifCys48Gv75D/5njiO21AmA3r61jLFz+n8oMIx X-Received: by 10.99.101.65 with SMTP id z62mr39991720pgb.74.1479789744883; Mon, 21 Nov 2016 20:42:24 -0800 (PST) Received: from localhost.localdomain ([104.237.91.87]) by smtp.gmail.com with ESMTPSA id s2sm41000141pfi.10.2016.11.21.20.42.18 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 21 Nov 2016 20:42:24 -0800 (PST) From: Zhangfei Gao To: Wolfram Sang Cc: linux-arm-kernel@lists.infradead.org, linux-i2c@vger.kernel.org, Zhangfei Gao Subject: [PATCH] i2c: designware: add reset interface Date: Tue, 22 Nov 2016 12:41:40 +0800 Message-Id: <1479789700-19532-1-git-send-email-zhangfei.gao@linaro.org> X-Mailer: git-send-email 2.7.4 Sender: linux-i2c-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-i2c@vger.kernel.org Some platforms like hi3660 need do reset first to allow accessing registers Signed-off-by: Zhangfei Gao --- drivers/i2c/busses/i2c-designware-core.h | 1 + drivers/i2c/busses/i2c-designware-platdrv.c | 5 +++++ 2 files changed, 6 insertions(+) -- 2.7.4 -- To unsubscribe from this list: send the line "unsubscribe linux-i2c" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/i2c/busses/i2c-designware-core.h b/drivers/i2c/busses/i2c-designware-core.h index 0d44d2a..94b14fa 100644 --- a/drivers/i2c/busses/i2c-designware-core.h +++ b/drivers/i2c/busses/i2c-designware-core.h @@ -80,6 +80,7 @@ struct dw_i2c_dev { void __iomem *base; struct completion cmd_complete; struct clk *clk; + struct reset_control *rst; u32 (*get_clk_rate_khz) (struct dw_i2c_dev *dev); struct dw_pci_controller *controller; int cmd_err; diff --git a/drivers/i2c/busses/i2c-designware-platdrv.c b/drivers/i2c/busses/i2c-designware-platdrv.c index 0b42a12..fd80e58 100644 --- a/drivers/i2c/busses/i2c-designware-platdrv.c +++ b/drivers/i2c/busses/i2c-designware-platdrv.c @@ -38,6 +38,7 @@ #include #include #include +#include #include #include #include @@ -176,6 +177,10 @@ static int dw_i2c_plat_probe(struct platform_device *pdev) dev->irq = irq; platform_set_drvdata(pdev, dev); + dev->rst = devm_reset_control_get(&pdev->dev, NULL); + if (!IS_ERR(dev->rst)) + reset_control_reset(dev->rst); + /* fast mode by default because of legacy reasons */ dev->clk_freq = 400000;