diff --git a/drivers/i2c/busses/i2c-mt65xx.c b/drivers/i2c/busses/i2c-mt65xx.c
index 8e6985354fd5..aa2e1cb87420 100644
--- a/drivers/i2c/busses/i2c-mt65xx.c
+++ b/drivers/i2c/busses/i2c-mt65xx.c
@@ -135,6 +135,7 @@ enum mtk_trans_op {
 enum I2C_REGS_OFFSET {
 	OFFSET_DATA_PORT,
 	OFFSET_SLAVE_ADDR,
+	OFFSET_SLAVE_ADDR1,
 	OFFSET_INTR_MASK,
 	OFFSET_INTR_STAT,
 	OFFSET_CONTROL,
@@ -203,6 +204,7 @@ static const u16 mt_i2c_regs_v1[] = {
 static const u16 mt_i2c_regs_v2[] = {
 	[OFFSET_DATA_PORT] = 0x0,
 	[OFFSET_SLAVE_ADDR] = 0x4,
+	[OFFSET_SLAVE_ADDR1] = 0x94,
 	[OFFSET_INTR_MASK] = 0x8,
 	[OFFSET_INTR_STAT] = 0xc,
 	[OFFSET_CONTROL] = 0x10,
@@ -241,6 +243,7 @@ struct mtk_i2c_compatible {
 	unsigned char ltiming_adjust: 1;
 	unsigned char apdma_sync: 1;
 	unsigned char max_dma_support;
+	unsigned char slave_addr_ver;
 };
 
 struct mtk_i2c_ac_timing {
@@ -345,6 +348,7 @@ static const struct mtk_i2c_compatible mt2712_compat = {
 	.ltiming_adjust = 0,
 	.apdma_sync = 0,
 	.max_dma_support = 33,
+	.slave_addr_ver = 0,
 };
 
 static const struct mtk_i2c_compatible mt6577_compat = {
@@ -359,6 +363,7 @@ static const struct mtk_i2c_compatible mt6577_compat = {
 	.ltiming_adjust = 0,
 	.apdma_sync = 0,
 	.max_dma_support = 32,
+	.slave_addr_ver = 0,
 };
 
 static const struct mtk_i2c_compatible mt6589_compat = {
@@ -373,6 +378,7 @@ static const struct mtk_i2c_compatible mt6589_compat = {
 	.ltiming_adjust = 0,
 	.apdma_sync = 0,
 	.max_dma_support = 32,
+	.slave_addr_ver = 0,
 };
 
 static const struct mtk_i2c_compatible mt7622_compat = {
@@ -387,6 +393,7 @@ static const struct mtk_i2c_compatible mt7622_compat = {
 	.ltiming_adjust = 0,
 	.apdma_sync = 0,
 	.max_dma_support = 32,
+	.slave_addr_ver = 0,
 };
 
 static const struct mtk_i2c_compatible mt8168_compat = {
@@ -400,6 +407,7 @@ static const struct mtk_i2c_compatible mt8168_compat = {
 	.ltiming_adjust = 0,
 	.apdma_sync = 0,
 	.max_dma_support = 33,
+	.slave_addr_ver = 0,
 };
 
 static const struct mtk_i2c_compatible mt8173_compat = {
@@ -413,6 +421,7 @@ static const struct mtk_i2c_compatible mt8173_compat = {
 	.ltiming_adjust = 0,
 	.apdma_sync = 0,
 	.max_dma_support = 33,
+	.slave_addr_ver = 0,
 };
 
 static const struct mtk_i2c_compatible mt8183_compat = {
@@ -427,6 +436,7 @@ static const struct mtk_i2c_compatible mt8183_compat = {
 	.ltiming_adjust = 1,
 	.apdma_sync = 0,
 	.max_dma_support = 33,
+	.slave_addr_ver = 0,
 };
 
 static const struct mtk_i2c_compatible mt8186_compat = {
@@ -440,6 +450,21 @@ static const struct mtk_i2c_compatible mt8186_compat = {
 	.ltiming_adjust = 1,
 	.apdma_sync = 0,
 	.max_dma_support = 36,
+	.slave_addr_ver = 0,
+};
+
+static const struct mtk_i2c_compatible mt8188_compat = {
+	.regs = mt_i2c_regs_v2,
+	.pmic_i2c = 0,
+	.dcm = 0,
+	.auto_restart = 1,
+	.aux_len_reg = 1,
+	.timing_adjust = 1,
+	.dma_sync = 0,
+	.ltiming_adjust = 1,
+	.apdma_sync = 1,
+	.max_dma_support = 36,
+	.slave_addr_ver = 1,
 };
 
 static const struct mtk_i2c_compatible mt8192_compat = {
@@ -454,6 +479,7 @@ static const struct mtk_i2c_compatible mt8192_compat = {
 	.ltiming_adjust = 1,
 	.apdma_sync = 1,
 	.max_dma_support = 36,
+	.slave_addr_ver = 0,
 };
 
 static const struct of_device_id mtk_i2c_of_match[] = {
@@ -465,6 +491,7 @@ static const struct of_device_id mtk_i2c_of_match[] = {
 	{ .compatible = "mediatek,mt8173-i2c", .data = &mt8173_compat },
 	{ .compatible = "mediatek,mt8183-i2c", .data = &mt8183_compat },
 	{ .compatible = "mediatek,mt8186-i2c", .data = &mt8186_compat },
+	{ .compatible = "mediatek,mt8188-i2c", .data = &mt8188_compat },
 	{ .compatible = "mediatek,mt8192-i2c", .data = &mt8192_compat },
 	{}
 };
@@ -877,8 +904,15 @@ static int mtk_i2c_set_speed(struct mtk_i2c *i2c, unsigned int parent_clk)
 
 static void i2c_dump_register(struct mtk_i2c *i2c)
 {
+	enum I2C_REGS_OFFSET sla_addr_offset;
+
+	if (i2c->dev_comp->slave_addr_ver == 1)
+		sla_addr_offset = OFFSET_SLAVE_ADDR1;
+	else
+		sla_addr_offset = OFFSET_SLAVE_ADDR;
+
 	dev_dbg(i2c->dev, "SLAVE_ADDR: 0x%x, INTR_MASK: 0x%x\n",
-		mtk_i2c_readw(i2c, OFFSET_SLAVE_ADDR),
+		mtk_i2c_readw(i2c, sla_addr_offset),
 		mtk_i2c_readw(i2c, OFFSET_INTR_MASK));
 	dev_dbg(i2c->dev, "INTR_STAT: 0x%x, CONTROL: 0x%x\n",
 		mtk_i2c_readw(i2c, OFFSET_INTR_STAT),
@@ -982,7 +1016,10 @@ static int mtk_i2c_do_transfer(struct mtk_i2c *i2c, struct i2c_msg *msgs,
 	mtk_i2c_writew(i2c, control_reg, OFFSET_CONTROL);
 
 	addr_reg = i2c_8bit_addr_from_msg(msgs);
-	mtk_i2c_writew(i2c, addr_reg, OFFSET_SLAVE_ADDR);
+	if (i2c->dev_comp->slave_addr_ver == 1)
+		mtk_i2c_writew(i2c, addr_reg, OFFSET_SLAVE_ADDR1);
+	else
+		mtk_i2c_writew(i2c, addr_reg, OFFSET_SLAVE_ADDR);
 
 	/* Clear interrupt status */
 	mtk_i2c_writew(i2c, restart_flag | I2C_HS_NACKERR | I2C_ACKERR |
