From patchwork Tue Aug 16 13:00:01 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Farber, Eliav" X-Patchwork-Id: 598321 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A2BA2C25B0E for ; Tue, 16 Aug 2022 13:02:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235194AbiHPNCa (ORCPT ); Tue, 16 Aug 2022 09:02:30 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38046 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235333AbiHPNAx (ORCPT ); Tue, 16 Aug 2022 09:00:53 -0400 Received: from smtp-fw-9103.amazon.com (smtp-fw-9103.amazon.com [207.171.188.200]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 395E7AF4B9; Tue, 16 Aug 2022 06:00:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amazon.com; i=@amazon.com; q=dns/txt; s=amazon201209; t=1660654832; x=1692190832; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=fBOgYnm75FE70ARuFmcIFl/WhiOHvXy19nDe9rxxofs=; b=p7BH7kMbOFSoqqYMgTg99hEwBk/l/R2C4YizNvOR2Of83PLPYBZPuiPf peuvV7fL+Z38lUqLTJ+vt+kWRDG7geglElA3NKbrbyyf10/iW0PppuPAt 43CtwEraIMBDSyObeBLQXmfXuSVUBz1lZm2Vf2mSjabsY2451LENi0K2R c=; X-IronPort-AV: E=Sophos;i="5.93,241,1654560000"; d="scan'208";a="1044804519" Received: from pdx4-co-svc-p1-lb2-vlan3.amazon.com (HELO email-inbound-relay-pdx-2a-11a39b7d.us-west-2.amazon.com) ([10.25.36.214]) by smtp-border-fw-9103.sea19.amazon.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 Aug 2022 13:00:05 +0000 Received: from EX13MTAUWB001.ant.amazon.com (pdx1-ws-svc-p6-lb9-vlan3.pdx.amazon.com [10.236.137.198]) by email-inbound-relay-pdx-2a-11a39b7d.us-west-2.amazon.com (Postfix) with ESMTPS id 0F57144983; Tue, 16 Aug 2022 13:00:05 +0000 (UTC) Received: from EX19D013UWB002.ant.amazon.com (10.13.138.21) by EX13MTAUWB001.ant.amazon.com (10.43.161.207) with Microsoft SMTP Server (TLS) id 15.0.1497.38; Tue, 16 Aug 2022 13:00:04 +0000 Received: from EX13MTAUWB001.ant.amazon.com (10.43.161.207) by EX19D013UWB002.ant.amazon.com (10.13.138.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA) id 15.2.1118.12; Tue, 16 Aug 2022 13:00:04 +0000 Received: from dev-dsk-farbere-1a-46ecabed.eu-west-1.amazon.com (172.19.116.181) by mail-relay.amazon.com (10.43.161.249) with Microsoft SMTP Server id 15.0.1497.38 via Frontend Transport; Tue, 16 Aug 2022 13:00:03 +0000 Received: by dev-dsk-farbere-1a-46ecabed.eu-west-1.amazon.com (Postfix, from userid 14301484) id 491F2453B; Tue, 16 Aug 2022 13:00:02 +0000 (UTC) From: Eliav Farber To: , , , , , , , CC: , , , , , , , , , , , Subject: [PATCH 1/2] dt-bindings: at24: new optional property - enable-gpios Date: Tue, 16 Aug 2022 13:00:01 +0000 Message-ID: <20220816130002.41450-2-farbere@amazon.com> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20220816130002.41450-1-farbere@amazon.com> References: <20220816130002.41450-1-farbere@amazon.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-i2c@vger.kernel.org Boards using the AT24 EEPROMs might have a GPIO that must be set to enable the chip (e.g. pin that controls the power supply). Add a new optional property to the device tree binding document, which allows to specify the GPIO line to which the enable pin is connected. On Linux this means that we need to hog the line at the beginning of probe function. Signed-off-by: Eliav Farber --- Documentation/devicetree/bindings/eeprom/at24.txt | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/eeprom/at24.txt b/Documentation/devicetree/bindings/eeprom/at24.txt index f9a7c984274c..553b53ed3e4c 100644 --- a/Documentation/devicetree/bindings/eeprom/at24.txt +++ b/Documentation/devicetree/bindings/eeprom/at24.txt @@ -73,6 +73,9 @@ Optional properties: - wp-gpios: GPIO to which the write-protect pin of the chip is connected. + - enable-gpios: GPIO to enables the chip (e.g. pin that controls the eeprom + power supply). + - address-width: number of address bits (one of 8, 16). Example: