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Mon, 1 Jul 2024 08:12:49 -0700 From: Krishna Yarlagadda To: , , , , , CC: , , , , , , , , , , , , , Subject: [RFC PATCH V2 02/12] dt-bindings: misc: Tegra configuration settings Date: Mon, 1 Jul 2024 20:42:20 +0530 Message-ID: <20240701151231.29425-3-kyarlagadda@nvidia.com> X-Mailer: git-send-email 2.43.2 In-Reply-To: <20240701151231.29425-1-kyarlagadda@nvidia.com> References: <20240701151231.29425-1-kyarlagadda@nvidia.com> Precedence: bulk X-Mailing-List: linux-i2c@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL6PEPF0001AB76:EE_|DS0PR12MB6462:EE_ X-MS-Office365-Filtering-Correlation-Id: b38aea5d-7e51-4211-d57a-08dc99e051bc X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|376014|82310400026|36860700013|7416014|1800799024; X-Microsoft-Antispam-Message-Info: Pl92aCLP6gpeN7XnPKAmwafwkGjYOOqoUvAfN6+eV1h1j5iB/kdGAscTHi+WGPh3LZkq/5aHQscKz8R/hj+0gzlqxhECQcshi/VlN/XZBq6ZM3Cb2HHy6CzmyvxECiXdQ8cykndF4n2QlAgy7z/jX6vfHuG7fjjVnhp6zUkHP92yWrW6Hr8nChcrSm6SROFJO9GD44FDegDk4QuFyAHDXBNlCQjwFPiwZPZzeo2BZFkEcQZj4Sjc27LNzaCuEFFe0e8iBDicls1wkBOZxQK/xrZOi4Ow7Q3R+anB0FKI9MMJg8vp+tY/EcQ9Epjjmbb3z3NMwTowoMya+pKReGAlA18n5QAFbolFgJVwZnbjWnjsZoMcimPtqeqHhm84xfC1TjCf53xpUiwLrdBu1ONY2AQrFGu4zH+Eosu28tJ0OhBVLZvXn24xa2zUebY76JpaMNTwFiz7rJtqSc4YNpX6lfO0GTHGBIRFAdE7KHg9jV3y6083s6Bx76V2tv3xuSvGz/BYasZOLUYqYoXmTcG8DqD5T77/t/hVvjMnQZ1NyMv6ePY1ceqCfyWUGx5V1UeRcYyx6fZWBU4De+LBXZN2D7xj1XN1Wj1c6ZrpkLr7K99He3TbpMhIrmNR1QgA8uzHMrPTfHbXN5CpV8tt+V4MHolO/DYwTE76dMc3Yb3FWES0jwNEKND+ssq1TNtUznifg3alJTLfJx18x7NucjhN9EE9T8RJylMVDXH9LN8Tanuu3Xbrkll1SX/epaZqL9BtyQvoIMjmfLExAsIjf6rkPuokC5hP/phcJsgVQ4/7sUK5rca3T69jfZSU8lUEIB0k7ECgIHYswUzfZ3Cvz5/IO5cPFrQplO4E9QPRD9Q1u/sQSg05mStGp28DUAYqJLbEtYjkRTt1SQ1H2IvKpAxz0MSDJnsfK3aBD7YtexFnpijV4x/f2mX2w5w/nefm2hk0s0ZC19TClhX45EL03PZPmQ2RGy7Y/TxPMdS/d608oXgFo083Q71cVaa7XwPxnsCpdJ/R9R/rLjlD87mmCilEDDDg6jqIbTabXp0D7kYvW0QNimvS5DrWMbk13qYGkyktWmEHp4tNQUWbMzVtNNTFNHcrt/sL+2qbbAP4F53SzJTufSaPAVGyz+eSqu+gx+pZNGI8OUJrWl+tZdjd67T+OjqdakVtjbfj5DAdyfSSlBY/Ki/hMkG/8ai6vYtDcKGyNhIzykGyZZ3rh0F9F3P8ZFkgI9Rirc7esFv68DgZkU+/ZgJK3envIwDjvAb1QmqqnOafHTNOhnsDM0Tf9cnNCz+LChOw4jRkPbMu1GySqN40TkwFyVVTlWOkx9CdZOqmR6j7o/+r7lrNHSa5RosPE/E0ztxquWx00IdBHycotNVbnGLYkq85JHSeI76rDClvqzfQ9ZcUMfaK/k7dRdlDmsDT5aOq0OKQ3sA/6/H3YMaZS4nHl6b038JVNQ6qMAMv X-Forefront-Antispam-Report: CIP:216.228.118.232; CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc7edge1.nvidia.com; CAT:NONE; SFS:(13230040)(376014)(82310400026)(36860700013)(7416014)(1800799024); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Jul 2024 15:13:10.1103 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: b38aea5d-7e51-4211-d57a-08dc99e051bc X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.118.232]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BL6PEPF0001AB76.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR12MB6462 Config framework parses device tree and provides a list of register settings with mask per mode to be applied by the controller. Add binding document for config settings framework. Config settings are defined as a property per field and have different modes per device. Signed-off-by: Krishna Yarlagadda --- .../misc/nvidia,tegra-config-settings.yaml | 62 +++++++++++++++++++ MAINTAINERS | 1 + 2 files changed, 63 insertions(+) create mode 100644 Documentation/devicetree/bindings/misc/nvidia,tegra-config-settings.yaml diff --git a/Documentation/devicetree/bindings/misc/nvidia,tegra-config-settings.yaml b/Documentation/devicetree/bindings/misc/nvidia,tegra-config-settings.yaml new file mode 100644 index 000000000000..4e5d52504c01 --- /dev/null +++ b/Documentation/devicetree/bindings/misc/nvidia,tegra-config-settings.yaml @@ -0,0 +1,62 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/misc/nvidia,tegra-config-settings.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Config properties for a device + +description: + Config setting is the configuration based on chip/board/system + characterization on interface/controller settings. This is needed for + - making the controller internal configuration to better perform + - making the interface to work proper by setting drive strength, slew + rates etc + - making the low power leakage. + There are two types of recommended configuration settings + - Controller register specific for internal operation of controller. + - Pad control/Pinmux/pincontrol registers for interfacing. + These configurations can further be categorized as static and dynamic. + - Static config does not change until a controller is reset. + - Dynamic config changes based on mode or condition, controller is + operating in. + +maintainers: + - Thierry Reding + +properties: + $nodename: + const: configsettings + +patternProperties: + "config-[a-z0-9_]+$": + description: + Config node representing properties of a device. Properties of + each device are listed under a unique subnode and referenced from + device node. + type: object + additionalProperties: false + + patternProperties: + "^[a-z0-9_]+-cfg$": + description: + Config profiles applied conditionally. + type: object + patternProperties: + "nvidia,[a-z0-9_]+$": + description: + Register field configuration. + $ref: /schemas/types.yaml#/definitions/uint32 + +additionalProperties: true + +examples: + - | + configsettings { + configi2c1: config-i2c3160000 { + i2c-common-cfg { + nvidia,i2c-hs-sclk-high-period = <0x03>; + nvidia,i2c-hs-sclk-low-period = <0x08>; + }; + }; + }; diff --git a/MAINTAINERS b/MAINTAINERS index 8a60c98ac755..ac8410ed421f 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -22260,6 +22260,7 @@ M: Thierry Reding R: Laxman Dewangan R: Krishna Yarlagadda S: Supported +F: Documentation/devicetree/bindings/misc/nvidia,tegra-config-settings.yaml F: Documentation/misc-devices/tegra-cfg.rst TEGRA PWM DRIVER