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Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by CH1PEPF0000A34C.mail.protection.outlook.com (10.167.244.6) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.7918.13 via Frontend Transport; Fri, 13 Sep 2024 12:12:03 +0000 Received: from jatayu.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Fri, 13 Sep 2024 07:12:01 -0500 From: Shyam Sundar S K To: Jean Delvare , Andi Shyti CC: , , Andy Shevchenko , , Shyam Sundar S K Subject: [PATCH v5 7/8] i2c: amd-asf: Clear remote IRR bit to get successive interrupt Date: Fri, 13 Sep 2024 17:41:09 +0530 Message-ID: <20240913121110.1611340-8-Shyam-sundar.S-k@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240913121110.1611340-1-Shyam-sundar.S-k@amd.com> References: <20240913121110.1611340-1-Shyam-sundar.S-k@amd.com> Precedence: bulk X-Mailing-List: linux-i2c@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH1PEPF0000A34C:EE_|IA1PR12MB6211:EE_ X-MS-Office365-Filtering-Correlation-Id: 551c03f4-ae79-445c-d9f4-08dcd3ed4788 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230040)(376014)(82310400026)(36860700013)(1800799024); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Sep 2024 12:12:03.9691 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 551c03f4-ae79-445c-d9f4-08dcd3ed4788 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CH1PEPF0000A34C.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA1PR12MB6211 To ensure successive interrupts upon packet reception, it is necessary to clear the remote IRR bit by writing the interrupt number to the EOI register. The base address for this operation is provided by the BIOS and retrieved by the driver by traversing the ASF object's namespace. Co-developed-by: Sanket Goswami Signed-off-by: Sanket Goswami Signed-off-by: Shyam Sundar S K --- drivers/i2c/busses/i2c-amd-asf-plat.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/drivers/i2c/busses/i2c-amd-asf-plat.c b/drivers/i2c/busses/i2c-amd-asf-plat.c index 1beef717ef40..77555416597f 100644 --- a/drivers/i2c/busses/i2c-amd-asf-plat.c +++ b/drivers/i2c/busses/i2c-amd-asf-plat.c @@ -45,6 +45,7 @@ static const char *amd_asf_port_name = " port 1"; struct amd_asf_dev { struct i2c_adapter adap; + void __iomem *eoi_base; struct device *dev; struct i2c_client *target; struct delayed_work work_buf; @@ -292,12 +293,14 @@ static irqreturn_t amd_asf_irq_handler(int irq, void *ptr) amd_asf_update_bits(piix4_smba, ASF_SLV_INTR, SMBHSTSTS, true); } + iowrite32(irq, dev->eoi_base); return IRQ_HANDLED; } static int amd_asf_probe(struct platform_device *pdev) { struct amd_asf_dev *asf_dev; + struct resource *eoi_addr; int ret, irq; asf_dev = devm_kzalloc(&pdev->dev, sizeof(*asf_dev), GFP_KERNEL); @@ -312,6 +315,14 @@ static int amd_asf_probe(struct platform_device *pdev) if (!asf_dev->port_addr) return dev_err_probe(&pdev->dev, -EINVAL, "missing IO resources\n"); + eoi_addr = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!eoi_addr) + return dev_err_probe(&pdev->dev, -EINVAL, "missing MEM resources\n"); + + asf_dev->eoi_base = devm_ioremap(&pdev->dev, eoi_addr->start, resource_size(eoi_addr)); + if (!asf_dev->eoi_base) + return dev_err_probe(&pdev->dev, -EBUSY, "failed mapping IO region\n"); + INIT_DELAYED_WORK(&asf_dev->work_buf, amd_asf_process_target); irq = platform_get_irq(pdev, 0);