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[71.13.243.92]) by smtp.gmail.com with ESMTPSA id s22-20020acaa916000000b0037fa61eb1dasm1198521oie.47.2023.02.17.10.49.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 17 Feb 2023 10:49:07 -0800 (PST) From: Danny Kaehn To: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, jikos@kernel.org, benjamin.tissoires@redhat.com Cc: bartosz.golaszewski@linaro.org, andriy.shevchenko@linux.intel.com, dmitry.torokhov@gmail.com, devicetree@vger.kernel.org, linux-input@vger.kernel.org, ethan.twardy@plexus.com Subject: [PATCH v6 1/3] dt-bindings: i2c: Add CP2112 HID USB to SMBus Bridge Date: Fri, 17 Feb 2023 12:49:02 -0600 Message-Id: <20230217184904.1290-2-kaehndan@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230217184904.1290-1-kaehndan@gmail.com> References: <20230217184904.1290-1-kaehndan@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-input@vger.kernel.org This is a USB HID device which includes an I2C controller and 8 GPIO pins. The binding allows describing the chip's gpio and i2c controller in DT using the subnodes named "gpio" and "i2c", respectively. This is intended to be used in configurations where the CP2112 is permanently connected in hardware. Signed-off-by: Danny Kaehn Reviewed-by: Rob Herring --- .../bindings/i2c/silabs,cp2112.yaml | 113 ++++++++++++++++++ 1 file changed, 113 insertions(+) create mode 100644 Documentation/devicetree/bindings/i2c/silabs,cp2112.yaml diff --git a/Documentation/devicetree/bindings/i2c/silabs,cp2112.yaml b/Documentation/devicetree/bindings/i2c/silabs,cp2112.yaml new file mode 100644 index 000000000000..a27509627804 --- /dev/null +++ b/Documentation/devicetree/bindings/i2c/silabs,cp2112.yaml @@ -0,0 +1,113 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/i2c/silabs,cp2112.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: CP2112 HID USB to SMBus/I2C Bridge + +maintainers: + - Danny Kaehn + +description: + The CP2112 is a USB HID device which includes an integrated I2C controller + and 8 GPIO pins. Its GPIO pins can each be configured as inputs, open-drain + outputs, or push-pull outputs. + +properties: + compatible: + const: usb10c4,ea90 + + reg: + maxItems: 1 + description: The USB port number on the host controller + + i2c: + description: The SMBus/I2C controller node for the CP2112 + $ref: /schemas/i2c/i2c-controller.yaml# + unevaluatedProperties: false + + properties: + sda-gpios: + maxItems: 1 + + scl-gpios: + maxItems: 1 + + clock-frequency: + minimum: 10000 + default: 100000 + maximum: 400000 + + gpio: + description: The GPIO controller node for the CP2112 + type: object + unevaluatedProperties: false + + properties: + interrupt-controller: true + "#interrupt-cells": + const: 2 + + gpio-controller: true + "#gpio-cells": + const: 2 + + gpio-line-names: + minItems: 1 + maxItems: 8 + + patternProperties: + "-hog(-[0-9]+)?$": + type: object + + required: + - gpio-hog + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + #include + #include + + usb { + #address-cells = <1>; + #size-cells = <0>; + + device@1 { + compatible = "usb10c4,ea90"; + reg = <1>; + + i2c { + #address-cells = <1>; + #size-cells = <0>; + sda-gpios = <&cp2112_gpio 0 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + scl-gpios = <&cp2112_gpio 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + + temp@48 { + compatible = "national,lm75"; + reg = <0x48>; + }; + }; + + cp2112_gpio: gpio { + gpio-controller; + interrupt-controller; + #gpio-cells = <2>; + gpio-line-names = "CP2112_SDA", "CP2112_SCL", "TEST2", + "TEST3","TEST4", "TEST5", "TEST6"; + + fan-rst-hog { + gpio-hog; + gpios = <7 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "FAN_RST"; + }; + }; + }; + };