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Sat, 14 Jun 2025 00:15:41 -0700 From: Nicolin Chen To: , , , CC: , , , , , , , , , , , , , , , , , , , , , , , , , Subject: [PATCH v6 23/25] iommu/tegra241-cmdqv: Do not statically map LVCMDQs Date: Sat, 14 Jun 2025 00:14:48 -0700 Message-ID: X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kselftest@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NV-OnPremToCloud: AnonymousSubmission X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL02EPF0001A0F9:EE_|IA1PR12MB7590:EE_ X-MS-Office365-Filtering-Correlation-Id: 44b3bfcf-3703-4851-8d61-08ddab134e21 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|7416014|376014|36860700013|82310400026|1800799024; X-Microsoft-Antispam-Message-Info: JH43Koy+KkGmJ2DIxRCc1isxfo4EopuNGgeeo7zisoP50n51dF8jfLbhOyg9UuGubJFvDfDafOLp63yso302n01cnwQhc7RjrYs2YqQa8PS3v9EX0PbximB5IoiqflBuQjdBzBvl3gJm6AMIqvCUWoCYYwK4YyZkn+sZKhZ2YOvwdbxsAOtmWM2C8mlxWBUSYmdo72o6yyTJJNW1DlDbeDgdrU6kwno27EoT43Om4Q5JLMM3NCyzyzIoPgpihVXYDofFQwiy9pL6Yh+R4FVNk1f+0WZikoMlim0cV8FvlX1JM2/5Xdu3VWXn4j5pN6MElxxs45eeaZhKxHXC6GFqYO+M9jJl3WsEfQadvVYuCraZm5eUyac4OYuv2SO7VT7NSTNx6cq9K2N2+j0p3zm/s7OvZc29yKzZGBMeo0dg0NpyfTR3WrDIwXDa8o9J+inqgPzybpU2E92iv4u8S0J98gC8v/+XXPx0bpBPkfx2yWjGLTWD5AfwwZ+TmrjKJdopB7is613I4iDr7Qdnj12ywtzunJLo8eRb7DMr7isev/37YXGpqkjvakbAXjMfANoLsm9G1pbbAyXa2hddpoy9F8MfO1YgFt8oet+2FTvF4tIQyPIljqFKx9HpHfQgJri1QnVTuf4bpFOTiWxu9Fm4I/irflQdHkOIMNmumBOpnxw2kgVR9AmWO70HBCqm5z9qLtuq12SCrSC/VmdzWsXVfyWro6pRZNjo22eLeECJ2xH36WbjVMxPFSaELpJAQuXlUjCcmxGJEzy8A4zcxzYnJeaH9oNveFOF0HkaCzadQX8LYZJMow59K5WH69aqdLWqlwUTprHlFNWjUCQ+/0zaYX0XsZjLVpH0C9/z/NmRZVnZwBrOiAGcwdpZ5ARFpQgfTtuMd8hMOZxpFUW1/9Oj6y61dF5cd+njczBYr9QQKMi+5vyjSdoh8uX48LPl3ESVoWY2Wg0JpbWLvhMDn48jxULZ+TDskzj1vz0tqm2Pc2huG/sOI64ggS9t58jcX68iWFnCFq142YDey9gQlg+ZXRYou+ebosBvAi+fkSvBBgGrDTweBOY+Spit/snfjZmKVZK/sPvBRsJNpM8cT2XdNN7Wv+zTkaJM8O3hZaGFouEWFBEraRYo6+XSY1I+eappsnxhzmwI12VO2Kl7KhUrpfr+eNZk5Ge3WZtGZzh4WNOcOHhAUpxxu+9uvE/iCUhSX3QcxQh0CIToEmgcKvd0A5w+S5IzokxbGdeHoJUBqMNuwcAz+fD/pTfIsJwuTIQK3OhCmq7cwBuvV7d3RO24M3PINHj+Wo2P0jYfOB0YTrWyA/6AmKCY35+Z+rgs7d+pLc3CmqhtBclVRi4g531sSV0PwQPc+XvdjDoPSfqIT1p/WGFXk8DhLHQTyt30W/qudRdZQjCjySgDIMpNjTiaym7faSju91kRWI9cyHmJ4A5QoqhgH1JTqf1Z9AsbOVNBaKnaDoykpGo2tecXlJ6eM/s98Vluo8S+3Gu4dmkHPz6SGoeoB2ask2BBju93BFfX X-Forefront-Antispam-Report: CIP:216.228.117.160; CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge1.nvidia.com; CAT:NONE; SFS:(13230040)(7416014)(376014)(36860700013)(82310400026)(1800799024); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 14 Jun 2025 07:15:55.8096 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 44b3bfcf-3703-4851-8d61-08ddab134e21 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.160]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF0001A0F9.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA1PR12MB7590 To simplify the mappings from global VCMDQs to VINTFs' LVCMDQs, the design chose to do static allocations and mappings in the global reset function. However, with the user-owned VINTF support, it exposes a security concern: if user space VM only wants one LVCMDQ for a VINTF, statically mapping two or more LVCMDQs creates a hidden VCMDQ that user space could DoS attack by writing random stuff to overwhelm the kernel with unhandleable IRQs. Thus, to support the user-owned VINTF feature, a LVCMDQ mapping has to be done dynamically. HW allows pre-assigning global VCMDQs in the CMDQ_ALLOC registers, without finalizing the mappings by keeping CMDQV_CMDQ_ALLOCATED=0. So, add a pair of map/unmap helper that simply sets/clears that bit. For kernel-owned VINTF0, move LVCMDQ mappings to tegra241_vintf_hw_init(), and the unmappings to tegra241_vintf_hw_deinit(). For user-owned VINTFs that will be added, the mappings/unmappings will be on demand upon an LVCMDQ allocation from the user space. However, the dynamic LVCMDQ mapping/unmapping can complicate the timing of calling tegra241_vcmdq_hw_init/deinit(), which write LVCMDQ address space, i.e. requiring LVCMDQ to be mapped. Highlight that with a note to the top of either of them. Acked-by: Pranjal Shrivastava Signed-off-by: Nicolin Chen --- .../iommu/arm/arm-smmu-v3/tegra241-cmdqv.c | 37 +++++++++++++++++-- 1 file changed, 33 insertions(+), 4 deletions(-) diff --git a/drivers/iommu/arm/arm-smmu-v3/tegra241-cmdqv.c b/drivers/iommu/arm/arm-smmu-v3/tegra241-cmdqv.c index 8d418c131b1b..869c90b660c1 100644 --- a/drivers/iommu/arm/arm-smmu-v3/tegra241-cmdqv.c +++ b/drivers/iommu/arm/arm-smmu-v3/tegra241-cmdqv.c @@ -351,6 +351,7 @@ tegra241_cmdqv_get_cmdq(struct arm_smmu_device *smmu, /* HW Reset Functions */ +/* This function is for LVCMDQ, so @vcmdq must not be unmapped yet */ static void tegra241_vcmdq_hw_deinit(struct tegra241_vcmdq *vcmdq) { char header[64], *h = lvcmdq_error_header(vcmdq, header, 64); @@ -379,6 +380,7 @@ static void tegra241_vcmdq_hw_deinit(struct tegra241_vcmdq *vcmdq) dev_dbg(vcmdq->cmdqv->dev, "%sdeinited\n", h); } +/* This function is for LVCMDQ, so @vcmdq must be mapped prior */ static int tegra241_vcmdq_hw_init(struct tegra241_vcmdq *vcmdq) { char header[64], *h = lvcmdq_error_header(vcmdq, header, 64); @@ -404,16 +406,42 @@ static int tegra241_vcmdq_hw_init(struct tegra241_vcmdq *vcmdq) return 0; } +/* Unmap a global VCMDQ from the pre-assigned LVCMDQ */ +static void tegra241_vcmdq_unmap_lvcmdq(struct tegra241_vcmdq *vcmdq) +{ + u32 regval = readl(REG_CMDQV(vcmdq->cmdqv, CMDQ_ALLOC(vcmdq->idx))); + char header[64], *h = lvcmdq_error_header(vcmdq, header, 64); + + writel(regval & ~CMDQV_CMDQ_ALLOCATED, + REG_CMDQV(vcmdq->cmdqv, CMDQ_ALLOC(vcmdq->idx))); + dev_dbg(vcmdq->cmdqv->dev, "%sunmapped\n", h); +} + static void tegra241_vintf_hw_deinit(struct tegra241_vintf *vintf) { - u16 lidx; + u16 lidx = vintf->cmdqv->num_lvcmdqs_per_vintf; - for (lidx = 0; lidx < vintf->cmdqv->num_lvcmdqs_per_vintf; lidx++) - if (vintf->lvcmdqs && vintf->lvcmdqs[lidx]) + /* HW requires to unmap LVCMDQs in descending order */ + while (lidx--) { + if (vintf->lvcmdqs && vintf->lvcmdqs[lidx]) { tegra241_vcmdq_hw_deinit(vintf->lvcmdqs[lidx]); + tegra241_vcmdq_unmap_lvcmdq(vintf->lvcmdqs[lidx]); + } + } vintf_write_config(vintf, 0); } +/* Map a global VCMDQ to the pre-assigned LVCMDQ */ +static void tegra241_vcmdq_map_lvcmdq(struct tegra241_vcmdq *vcmdq) +{ + u32 regval = readl(REG_CMDQV(vcmdq->cmdqv, CMDQ_ALLOC(vcmdq->idx))); + char header[64], *h = lvcmdq_error_header(vcmdq, header, 64); + + writel(regval | CMDQV_CMDQ_ALLOCATED, + REG_CMDQV(vcmdq->cmdqv, CMDQ_ALLOC(vcmdq->idx))); + dev_dbg(vcmdq->cmdqv->dev, "%smapped\n", h); +} + static int tegra241_vintf_hw_init(struct tegra241_vintf *vintf, bool hyp_own) { u32 regval; @@ -441,8 +469,10 @@ static int tegra241_vintf_hw_init(struct tegra241_vintf *vintf, bool hyp_own) */ vintf->hyp_own = !!(VINTF_HYP_OWN & readl(REG_VINTF(vintf, CONFIG))); + /* HW requires to map LVCMDQs in ascending order */ for (lidx = 0; lidx < vintf->cmdqv->num_lvcmdqs_per_vintf; lidx++) { if (vintf->lvcmdqs && vintf->lvcmdqs[lidx]) { + tegra241_vcmdq_map_lvcmdq(vintf->lvcmdqs[lidx]); ret = tegra241_vcmdq_hw_init(vintf->lvcmdqs[lidx]); if (ret) { tegra241_vintf_hw_deinit(vintf); @@ -476,7 +506,6 @@ static int tegra241_cmdqv_hw_reset(struct arm_smmu_device *smmu) for (lidx = 0; lidx < cmdqv->num_lvcmdqs_per_vintf; lidx++) { regval = FIELD_PREP(CMDQV_CMDQ_ALLOC_VINTF, idx); regval |= FIELD_PREP(CMDQV_CMDQ_ALLOC_LVCMDQ, lidx); - regval |= CMDQV_CMDQ_ALLOCATED; writel_relaxed(regval, REG_CMDQV(cmdqv, CMDQ_ALLOC(qidx++))); }