From patchwork Wed Apr 29 20:28:16 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Dan Murphy X-Patchwork-Id: 209074 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.9 required=3.0 tests=DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 102BEC83004 for ; Wed, 29 Apr 2020 20:37:29 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id DCD6C21707 for ; Wed, 29 Apr 2020 20:37:28 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="UTED1GJM" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726775AbgD2Uh2 (ORCPT ); Wed, 29 Apr 2020 16:37:28 -0400 Received: from fllv0015.ext.ti.com ([198.47.19.141]:47884 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727093AbgD2Uh0 (ORCPT ); Wed, 29 Apr 2020 16:37:26 -0400 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 03TKbBpL061896; Wed, 29 Apr 2020 15:37:11 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1588192631; bh=l5RB1BFBNGs53h/lFYd+NbwK21SIGQnFwb+EHjWJYqg=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=UTED1GJMB4C7DXpztES1BLIbUYHKTGH21o02cdfA10yAQtQRL+ArCPSmvyRCKgNZ4 LSr/FJV7aFy7xOikzs57eWjY9lbN6M6ZVHB5AD/HWbsrP+aNI/ckfb8ABzpT6iHNRR LK+XBhbjTeuYlVBCtkqCsLjIrkfkifnR+m8KYdNU= Received: from DFLE109.ent.ti.com (dfle109.ent.ti.com [10.64.6.30]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTP id 03TKbBCx115217; Wed, 29 Apr 2020 15:37:11 -0500 Received: from DFLE114.ent.ti.com (10.64.6.35) by DFLE109.ent.ti.com (10.64.6.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Wed, 29 Apr 2020 15:37:10 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Wed, 29 Apr 2020 15:37:10 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 03TKbAuK017504; Wed, 29 Apr 2020 15:37:10 -0500 From: Dan Murphy To: , CC: , , Dan Murphy , Rob Herring , Tony Lindgren , =?utf-8?q?Beno=C3=AEt_Cousson?= , Linus Walleij , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team Subject: [PATCH v23 16/16] dt: bindings: Update lp55xx binding to recommended LED naming Date: Wed, 29 Apr 2020 15:28:16 -0500 Message-ID: <20200429202816.26501-17-dmurphy@ti.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200429202816.26501-1-dmurphy@ti.com> References: <20200429202816.26501-1-dmurphy@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-leds-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-leds@vger.kernel.org Update the LP55xx DT binding examples to the recommended node naming convention. There are no changes to the DT properties. Acked-by: Pavel Machek Acked-by: Jacek Anaszewski Signed-off-by: Dan Murphy CC: Rob Herring CC: Tony Lindgren CC: "Benoît Cousson" CC: Linus Walleij CC: Shawn Guo CC: Sascha Hauer CC: Pengutronix Kernel Team CC: Fabio Estevam CC: NXP Linux Team --- .../devicetree/bindings/leds/leds-lp55xx.txt | 58 +++++++++---------- 1 file changed, 29 insertions(+), 29 deletions(-) diff --git a/Documentation/devicetree/bindings/leds/leds-lp55xx.txt b/Documentation/devicetree/bindings/leds/leds-lp55xx.txt index 0ccc1efc2499..5475f45ef51f 100644 --- a/Documentation/devicetree/bindings/leds/leds-lp55xx.txt +++ b/Documentation/devicetree/bindings/leds/leds-lp55xx.txt @@ -48,7 +48,7 @@ example 1) LP5521 'lp5521_pri:channel1' and 'lp5521_pri:channel2', with a heartbeat trigger on channel 0. -lp5521@32 { +led-controller@32 { #address-cells = <1>; #size-cells = <0>; compatible = "national,lp5521"; @@ -56,20 +56,20 @@ lp5521@32 { label = "lp5521_pri"; clock-mode = /bits/ 8 <2>; - chan@0 { + led@0 { reg = <0>; led-cur = /bits/ 8 <0x2f>; max-cur = /bits/ 8 <0x5f>; linux,default-trigger = "heartbeat"; }; - chan@1 { + led@1 { reg = <1>; led-cur = /bits/ 8 <0x2f>; max-cur = /bits/ 8 <0x5f>; }; - chan@2 { + led@2 { reg = <2>; led-cur = /bits/ 8 <0x2f>; max-cur = /bits/ 8 <0x5f>; @@ -88,70 +88,70 @@ ASEL1 ASEL0 Address VEN GND 34h VEN VEN 35h -lp5523@32 { +led-controller@32 { #address-cells = <1>; #size-cells = <0>; compatible = "national,lp5523"; reg = <0x32>; clock-mode = /bits/ 8 <1>; - chan@0 { + led@0 { reg = <0>; chan-name = "d1"; led-cur = /bits/ 8 <0x14>; max-cur = /bits/ 8 <0x20>; }; - chan@1 { + led@1 { reg = <1>; chan-name = "d2"; led-cur = /bits/ 8 <0x14>; max-cur = /bits/ 8 <0x20>; }; - chan@2 { + led@2 { reg = <2>; chan-name = "d3"; led-cur = /bits/ 8 <0x14>; max-cur = /bits/ 8 <0x20>; }; - chan@3 { + led@3 { reg = <3>; chan-name = "d4"; led-cur = /bits/ 8 <0x14>; max-cur = /bits/ 8 <0x20>; }; - chan@4 { + led@4 { reg = <4>; chan-name = "d5"; led-cur = /bits/ 8 <0x14>; max-cur = /bits/ 8 <0x20>; }; - chan@5 { + led@5 { reg = <5>; chan-name = "d6"; led-cur = /bits/ 8 <0x14>; max-cur = /bits/ 8 <0x20>; }; - chan@6 { + led@6 { reg = <6>; chan-name = "d7"; led-cur = /bits/ 8 <0x14>; max-cur = /bits/ 8 <0x20>; }; - chan@7 { + led@7 { reg = <7>; chan-name = "d8"; led-cur = /bits/ 8 <0x14>; max-cur = /bits/ 8 <0x20>; }; - chan@8 { + led@8 { reg = <8>; chan-name = "d9"; led-cur = /bits/ 8 <0x14>; @@ -162,35 +162,35 @@ lp5523@32 { example 3) LP5562 4 channels are defined. -lp5562@30 { +led-controller@30 { #address-cells = <1>; #size-cells = <0>; compatible = "ti,lp5562"; reg = <0x30>; clock-mode = /bits/8 <2>; - chan@0 { + led@0 { reg = <0>; chan-name = "R"; led-cur = /bits/ 8 <0x20>; max-cur = /bits/ 8 <0x60>; }; - chan@1 { + led@1 { reg = <1>; chan-name = "G"; led-cur = /bits/ 8 <0x20>; max-cur = /bits/ 8 <0x60>; }; - chan@2 { + led@2 { reg = <2>; chan-name = "B"; led-cur = /bits/ 8 <0x20>; max-cur = /bits/ 8 <0x60>; }; - chan@3 { + led@3 { reg = <3>; chan-name = "W"; led-cur = /bits/ 8 <0x20>; @@ -202,7 +202,7 @@ example 4) LP8501 9 channels are defined. The 'pwr-sel' is LP8501 specific property. Others are same as LP5523. -lp8501@32 { +led-controller@32 { #address-cells = <1>; #size-cells = <0>; compatible = "ti,lp8501"; @@ -210,63 +210,63 @@ lp8501@32 { clock-mode = /bits/ 8 <2>; pwr-sel = /bits/ 8 <3>; /* D1~9 connected to VOUT */ - chan@0 { + led@0 { reg = <0>; chan-name = "d1"; led-cur = /bits/ 8 <0x14>; max-cur = /bits/ 8 <0x20>; }; - chan@1 { + led@1 { reg = <1>; chan-name = "d2"; led-cur = /bits/ 8 <0x14>; max-cur = /bits/ 8 <0x20>; }; - chan@2 { + led@2 { reg = <2>; chan-name = "d3"; led-cur = /bits/ 8 <0x14>; max-cur = /bits/ 8 <0x20>; }; - chan@3 { + led@3 { reg = <3>; chan-name = "d4"; led-cur = /bits/ 8 <0x14>; max-cur = /bits/ 8 <0x20>; }; - chan@4 { + led@4 { reg = <4>; chan-name = "d5"; led-cur = /bits/ 8 <0x14>; max-cur = /bits/ 8 <0x20>; }; - chan@5 { + led@5 { reg = <5>; chan-name = "d6"; led-cur = /bits/ 8 <0x14>; max-cur = /bits/ 8 <0x20>; }; - chan@6 { + led@6 { reg = <6>; chan-name = "d7"; led-cur = /bits/ 8 <0x14>; max-cur = /bits/ 8 <0x20>; }; - chan@7 { + led@7 { reg = <7>; chan-name = "d8"; led-cur = /bits/ 8 <0x14>; max-cur = /bits/ 8 <0x20>; }; - chan@8 { + led@8 { reg = <8>; chan-name = "d9"; led-cur = /bits/ 8 <0x14>;