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[88.1.105.170]) by smtp.gmail.com with ESMTPSA id b83sm1903753wmd.4.2021.02.23.00.17.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 23 Feb 2021 00:17:35 -0800 (PST) From: =?utf-8?q?=C3=81lvaro_Fern=C3=A1ndez_Rojas?= To: f.fainelli@gmail.com, Pavel Machek , Dan Murphy , linux-leds@vger.kernel.org, linux-kernel@vger.kernel.org Cc: =?utf-8?q?=C3=81lvaro_Fern=C3=A1ndez_Rojas?= Subject: [PATCH 1/2] leds: bcm6328: improve write and read functions Date: Tue, 23 Feb 2021 09:17:31 +0100 Message-Id: <20210223081732.9362-2-noltari@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210223081732.9362-1-noltari@gmail.com> References: <20210223081732.9362-1-noltari@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-leds@vger.kernel.org This is proven to work in BMIPS BE/LE and ARM BE/LE, as used in bcm2835-rng and bcmgenet drivers. Both should also be inline functions. Signed-off-by: Álvaro Fernández Rojas --- drivers/leds/leds-bcm6328.c | 25 +++++++++++++------------ 1 file changed, 13 insertions(+), 12 deletions(-) diff --git a/drivers/leds/leds-bcm6328.c b/drivers/leds/leds-bcm6328.c index 226d17d253ed..112c9c858432 100644 --- a/drivers/leds/leds-bcm6328.c +++ b/drivers/leds/leds-bcm6328.c @@ -75,22 +75,23 @@ struct bcm6328_led { bool active_low; }; -static void bcm6328_led_write(void __iomem *reg, unsigned long data) +static inline void bcm6328_led_write(void __iomem *reg, unsigned long data) { -#ifdef CONFIG_CPU_BIG_ENDIAN - iowrite32be(data, reg); -#else - writel(data, reg); -#endif + /* MIPS chips strapped for BE will automagically configure the + * peripheral registers for CPU-native byte order. + */ + if (IS_ENABLED(CONFIG_MIPS) && IS_ENABLED(CONFIG_CPU_BIG_ENDIAN)) + __raw_writel(data, reg); + else + writel_relaxed(data, reg); } -static unsigned long bcm6328_led_read(void __iomem *reg) +static inline unsigned long bcm6328_led_read(void __iomem *reg) { -#ifdef CONFIG_CPU_BIG_ENDIAN - return ioread32be(reg); -#else - return readl(reg); -#endif + if (IS_ENABLED(CONFIG_MIPS) && IS_ENABLED(CONFIG_CPU_BIG_ENDIAN)) + return __raw_readl(reg); + else + return readl_relaxed(reg); } /**