mbox series

[v2,0/7] media: nxp: i.MX8 ISI driver

Message ID 20220712000251.13607-1-laurent.pinchart@ideasonboard.com
Headers show
Series media: nxp: i.MX8 ISI driver | expand

Message

Laurent Pinchart July 12, 2022, 12:02 a.m. UTC
Hello,

This patch series adds a new driver for the Imaging Sensor Interface,
an IP core found in various NXP i.MX8 SoCs, including the i.MX8MN and
the i.MX8MP.

The first five patches have already been posted and acked. This v2
addresses small review comments, and I will send a pull request shortly.

Patches 6/7 and 7/7 add the DT bindings and the driver. The driver
depends on the v11 of the V4L2 streams series ("[PATCH v11 00/36] v4l:
routing and streams support", posted to [1]). This blocks upstreaming of
the driver, but this series showcases another user of the streams API,
which I hope will help getting it merged. Both the bindings and the
driver are ready for review.

[1] https://lore.kernel.org/linux-media/20220301161156.1119557-1-tomi.valkeinen@ideasonboard.com/

Laurent Pinchart (7):
  media: v4l: Add packed YUV 4:4:4 YUVA and YUVX pixel formats
  media: v4l2-tpg: Add support for the new YUVA and YUVX formats
  media: vivid: Add support for the new YUVA and YUVX formats
  media: v4l2: Make colorspace validity checks more future-proof
  media: v4l2: Sanitize colorspace values in the framework
  dt-bindings: media: Add i.MX8 ISI DT bindings
  media: nxp: Add i.MX8 ISI driver

 .../bindings/media/nxp,imx8-isi.yaml          |  148 ++
 .../media/v4l/pixfmt-packed-yuv.rst           |   20 +
 MAINTAINERS                                   |    7 +
 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c |    6 +
 drivers/media/platform/nxp/Kconfig            |    2 +
 drivers/media/platform/nxp/Makefile           |    1 +
 drivers/media/platform/nxp/imx8-isi/Kconfig   |   22 +
 drivers/media/platform/nxp/imx8-isi/Makefile  |    9 +
 .../platform/nxp/imx8-isi/imx8-isi-core.c     |  646 +++++++
 .../platform/nxp/imx8-isi/imx8-isi-core.h     |  394 +++++
 .../platform/nxp/imx8-isi/imx8-isi-crossbar.c |  529 ++++++
 .../platform/nxp/imx8-isi/imx8-isi-debug.c    |  109 ++
 .../media/platform/nxp/imx8-isi/imx8-isi-hw.c |  651 +++++++
 .../platform/nxp/imx8-isi/imx8-isi-m2m.c      |  858 ++++++++++
 .../platform/nxp/imx8-isi/imx8-isi-pipe.c     |  867 ++++++++++
 .../platform/nxp/imx8-isi/imx8-isi-regs.h     |  418 +++++
 .../platform/nxp/imx8-isi/imx8-isi-video.c    | 1513 +++++++++++++++++
 .../test-drivers/vivid/vivid-vid-common.c     |   15 +
 drivers/media/v4l2-core/v4l2-ioctl.c          |   67 +-
 include/media/v4l2-common.h                   |    6 +-
 include/uapi/linux/videodev2.h                |   24 +
 21 files changed, 6299 insertions(+), 13 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/media/nxp,imx8-isi.yaml
 create mode 100644 drivers/media/platform/nxp/imx8-isi/Kconfig
 create mode 100644 drivers/media/platform/nxp/imx8-isi/Makefile
 create mode 100644 drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c
 create mode 100644 drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h
 create mode 100644 drivers/media/platform/nxp/imx8-isi/imx8-isi-crossbar.c
 create mode 100644 drivers/media/platform/nxp/imx8-isi/imx8-isi-debug.c
 create mode 100644 drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c
 create mode 100644 drivers/media/platform/nxp/imx8-isi/imx8-isi-m2m.c
 create mode 100644 drivers/media/platform/nxp/imx8-isi/imx8-isi-pipe.c
 create mode 100644 drivers/media/platform/nxp/imx8-isi/imx8-isi-regs.h
 create mode 100644 drivers/media/platform/nxp/imx8-isi/imx8-isi-video.c


base-commit: a74a91c3c5b2db0e7712bef12ea792795668b7e6

Comments

Krzysztof Kozlowski July 12, 2022, 7:49 a.m. UTC | #1
On 12/07/2022 02:02, Laurent Pinchart wrote:
> The Image Sensing Interface (ISI) combines image processing pipelines
> with DMA engines to process and capture frames originating from a
> variety of sources. The inputs to the ISI go through Pixel Link
> interfaces, and their number and nature is SoC-dependent. They cover
> both capture interfaces (MIPI CSI-2 RX, HDMI RX) and memory inputs.
> 
> Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> ---
> Changes since v1:
> 
> - Fix compatible string checks in conditional schema
> - Fix interrupts property handling
> ---
>  .../bindings/media/nxp,imx8-isi.yaml          | 148 ++++++++++++++++++
>  1 file changed, 148 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/media/nxp,imx8-isi.yaml
> 
> diff --git a/Documentation/devicetree/bindings/media/nxp,imx8-isi.yaml b/Documentation/devicetree/bindings/media/nxp,imx8-isi.yaml
> new file mode 100644
> index 000000000000..390dfa03026b
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/media/nxp,imx8-isi.yaml
> @@ -0,0 +1,148 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/media/nxp,imx8-isi.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: i.MX8 Image Sensing Interface
> +
> +maintainers:
> +  - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> +
> +description: |
> +  The Image Sensing Interface (ISI) combines image processing pipelines with
> +  DMA engines to process and capture frames originating from a variety of
> +  sources. The inputs to the ISI go through Pixel Link interfaces, and their
> +  number and nature is SoC-dependent. They cover both capture interfaces (MIPI
> +  CSI-2 RX, HDMI RX, ...) and display engine outputs for writeback support.
> +
> +properties:
> +  compatible:
> +    enum:
> +      - fsl,imx8mn-isi
> +      - fsl,imx8mp-isi
> +
> +  reg:
> +    maxItems: 1
> +
> +  clocks:
> +    items:
> +      - description: The AXI clock
> +      - description: The APB clock
> +      # TODO: Check if the per-channel ipg_proc_clk clocks need to be specified
> +      # as well, in case some SoCs have the ability to control them separately.
> +      # This may be the case of the i.MX8[DQ]X(P)
> +
> +  clock-names:
> +    items:
> +      - const: axi
> +      - const: apb
> +
> +  fsl,blk-ctrl:
> +    $ref: /schemas/types.yaml#/definitions/phandle
> +    description:
> +      A phandle referencing the block control that contains the CSIS to ISI
> +      gasket.
> +
> +  interrupts: true

Need generic constraints - min/maxItems.

> +
> +  power-domains: true

Ditto.

> +
> +  ports:
> +    $ref: /schemas/graph.yaml#/properties/ports
> +    description: |
> +      Ports represent the Pixel Link inputs to the ISI. Their number and
> +      assignment are model-dependent. Each port shall have a single endpoint.
> +
> +    patternProperties:
> +      "^port@[0-9]$":
> +        $ref: /schemas/graph.yaml#/properties/port
> +        unevaluatedProperties: false
> +
> +    unevaluatedProperties: false

At least one port is always required?


> +
> +required:
> +  - compatible
> +  - reg
> +  - interrupts
> +  - clocks
> +  - clock-names
> +  - fsl,blk-ctrl
> +  - ports
> +
> +allOf:
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            const: fsl,imx8mn-isi
> +    then:
> +      properties:
> +        interrupts:
> +          maxItems: 1
> +        ports:
> +          properties:
> +            port@0:
> +              description: MIPI CSI-2 RX
> +          required:
> +            - port@0
> +
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            const: fsl,imx8mp-isi
> +    then:
> +      properties:
> +        interrupts:
> +          maxItems: 2

You need to describe the items.


Best regards,
Krzysztof
Laurent Pinchart July 12, 2022, 10:25 a.m. UTC | #2
Hi Krzysztof,

On Tue, Jul 12, 2022 at 09:49:45AM +0200, Krzysztof Kozlowski wrote:
> On 12/07/2022 02:02, Laurent Pinchart wrote:
> > The Image Sensing Interface (ISI) combines image processing pipelines
> > with DMA engines to process and capture frames originating from a
> > variety of sources. The inputs to the ISI go through Pixel Link
> > interfaces, and their number and nature is SoC-dependent. They cover
> > both capture interfaces (MIPI CSI-2 RX, HDMI RX) and memory inputs.
> > 
> > Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> > ---
> > Changes since v1:
> > 
> > - Fix compatible string checks in conditional schema
> > - Fix interrupts property handling
> > ---
> >  .../bindings/media/nxp,imx8-isi.yaml          | 148 ++++++++++++++++++
> >  1 file changed, 148 insertions(+)
> >  create mode 100644 Documentation/devicetree/bindings/media/nxp,imx8-isi.yaml
> > 
> > diff --git a/Documentation/devicetree/bindings/media/nxp,imx8-isi.yaml b/Documentation/devicetree/bindings/media/nxp,imx8-isi.yaml
> > new file mode 100644
> > index 000000000000..390dfa03026b
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/media/nxp,imx8-isi.yaml
> > @@ -0,0 +1,148 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/media/nxp,imx8-isi.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: i.MX8 Image Sensing Interface
> > +
> > +maintainers:
> > +  - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> > +
> > +description: |
> > +  The Image Sensing Interface (ISI) combines image processing pipelines with
> > +  DMA engines to process and capture frames originating from a variety of
> > +  sources. The inputs to the ISI go through Pixel Link interfaces, and their
> > +  number and nature is SoC-dependent. They cover both capture interfaces (MIPI
> > +  CSI-2 RX, HDMI RX, ...) and display engine outputs for writeback support.
> > +
> > +properties:
> > +  compatible:
> > +    enum:
> > +      - fsl,imx8mn-isi
> > +      - fsl,imx8mp-isi
> > +
> > +  reg:
> > +    maxItems: 1
> > +
> > +  clocks:
> > +    items:
> > +      - description: The AXI clock
> > +      - description: The APB clock
> > +      # TODO: Check if the per-channel ipg_proc_clk clocks need to be specified
> > +      # as well, in case some SoCs have the ability to control them separately.
> > +      # This may be the case of the i.MX8[DQ]X(P)
> > +
> > +  clock-names:
> > +    items:
> > +      - const: axi
> > +      - const: apb
> > +
> > +  fsl,blk-ctrl:
> > +    $ref: /schemas/types.yaml#/definitions/phandle
> > +    description:
> > +      A phandle referencing the block control that contains the CSIS to ISI
> > +      gasket.
> > +
> > +  interrupts: true
> 
> Need generic constraints - min/maxItems.

I can't set maxItems here, as the value depends on the compatible
string. It's set below as part of the "allOf". I could set minItems to
1, but I don't really see a point in doing so.

> > +
> > +  power-domains: true
> 
> Ditto.

I'll fix this one.

> > +
> > +  ports:
> > +    $ref: /schemas/graph.yaml#/properties/ports
> > +    description: |
> > +      Ports represent the Pixel Link inputs to the ISI. Their number and
> > +      assignment are model-dependent. Each port shall have a single endpoint.
> > +
> > +    patternProperties:
> > +      "^port@[0-9]$":
> > +        $ref: /schemas/graph.yaml#/properties/port
> > +        unevaluatedProperties: false
> > +
> > +    unevaluatedProperties: false
> 
> At least one port is always required?

That's a fair assumption I think. How would you express that ? There's
no patternRequired as far as I know. Note that the device-dependent
ports are described in the "allOf" section below, where "required" is
set per device model.

> > +
> > +required:
> > +  - compatible
> > +  - reg
> > +  - interrupts
> > +  - clocks
> > +  - clock-names
> > +  - fsl,blk-ctrl
> > +  - ports
> > +
> > +allOf:
> > +  - if:
> > +      properties:
> > +        compatible:
> > +          contains:
> > +            const: fsl,imx8mn-isi
> > +    then:
> > +      properties:
> > +        interrupts:
> > +          maxItems: 1
> > +        ports:
> > +          properties:
> > +            port@0:
> > +              description: MIPI CSI-2 RX
> > +          required:
> > +            - port@0
> > +
> > +  - if:
> > +      properties:
> > +        compatible:
> > +          contains:
> > +            const: fsl,imx8mp-isi
> > +    then:
> > +      properties:
> > +        interrupts:
> > +          maxItems: 2
> 
> You need to describe the items.

It's one interrupt per pipeline. Can I add the description to the
generic interrupts property instead of documenting each item
individually ? Something along the lines of

  interrupts:
    description: Processing pipeline interrupts, one per pipeline
Krzysztof Kozlowski July 12, 2022, 12:49 p.m. UTC | #3
On 12/07/2022 12:25, Laurent Pinchart wrote:
> Hi Krzysztof,
> 
> On Tue, Jul 12, 2022 at 09:49:45AM +0200, Krzysztof Kozlowski wrote:
>> On 12/07/2022 02:02, Laurent Pinchart wrote:
>>> The Image Sensing Interface (ISI) combines image processing pipelines
>>> with DMA engines to process and capture frames originating from a
>>> variety of sources. The inputs to the ISI go through Pixel Link
>>> interfaces, and their number and nature is SoC-dependent. They cover
>>> both capture interfaces (MIPI CSI-2 RX, HDMI RX) and memory inputs.
>>>
>>> Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
>>> ---
>>> Changes since v1:
>>>
>>> - Fix compatible string checks in conditional schema
>>> - Fix interrupts property handling
>>> ---
>>>  .../bindings/media/nxp,imx8-isi.yaml          | 148 ++++++++++++++++++
>>>  1 file changed, 148 insertions(+)
>>>  create mode 100644 Documentation/devicetree/bindings/media/nxp,imx8-isi.yaml
>>>
>>> diff --git a/Documentation/devicetree/bindings/media/nxp,imx8-isi.yaml b/Documentation/devicetree/bindings/media/nxp,imx8-isi.yaml
>>> new file mode 100644
>>> index 000000000000..390dfa03026b
>>> --- /dev/null
>>> +++ b/Documentation/devicetree/bindings/media/nxp,imx8-isi.yaml
>>> @@ -0,0 +1,148 @@
>>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>>> +%YAML 1.2
>>> +---
>>> +$id: http://devicetree.org/schemas/media/nxp,imx8-isi.yaml#
>>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>>> +
>>> +title: i.MX8 Image Sensing Interface
>>> +
>>> +maintainers:
>>> +  - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
>>> +
>>> +description: |
>>> +  The Image Sensing Interface (ISI) combines image processing pipelines with
>>> +  DMA engines to process and capture frames originating from a variety of
>>> +  sources. The inputs to the ISI go through Pixel Link interfaces, and their
>>> +  number and nature is SoC-dependent. They cover both capture interfaces (MIPI
>>> +  CSI-2 RX, HDMI RX, ...) and display engine outputs for writeback support.
>>> +
>>> +properties:
>>> +  compatible:
>>> +    enum:
>>> +      - fsl,imx8mn-isi
>>> +      - fsl,imx8mp-isi
>>> +
>>> +  reg:
>>> +    maxItems: 1
>>> +
>>> +  clocks:
>>> +    items:
>>> +      - description: The AXI clock
>>> +      - description: The APB clock
>>> +      # TODO: Check if the per-channel ipg_proc_clk clocks need to be specified
>>> +      # as well, in case some SoCs have the ability to control them separately.
>>> +      # This may be the case of the i.MX8[DQ]X(P)
>>> +
>>> +  clock-names:
>>> +    items:
>>> +      - const: axi
>>> +      - const: apb
>>> +
>>> +  fsl,blk-ctrl:
>>> +    $ref: /schemas/types.yaml#/definitions/phandle
>>> +    description:
>>> +      A phandle referencing the block control that contains the CSIS to ISI
>>> +      gasket.
>>> +
>>> +  interrupts: true
>>
>> Need generic constraints - min/maxItems.
> 
> I can't set maxItems here, as the value depends on the compatible
> string. It's set below as part of the "allOf". I could set minItems to
> 1, but I don't really see a point in doing so.

Of course you can, just like all other files could.

https://elixir.bootlin.com/linux/v5.19-rc6/source/Documentation/devicetree/bindings/clock/samsung,exynos7-clock.yaml#L57

> 
>>> +
>>> +  power-domains: true
>>
>> Ditto.
> 
> I'll fix this one.
> 
>>> +
>>> +  ports:
>>> +    $ref: /schemas/graph.yaml#/properties/ports
>>> +    description: |
>>> +      Ports represent the Pixel Link inputs to the ISI. Their number and
>>> +      assignment are model-dependent. Each port shall have a single endpoint.
>>> +
>>> +    patternProperties:
>>> +      "^port@[0-9]$":
>>> +        $ref: /schemas/graph.yaml#/properties/port
>>> +        unevaluatedProperties: false
>>> +
>>> +    unevaluatedProperties: false
>>
>> At least one port is always required?
> 
> That's a fair assumption I think. How would you express that ? There's
> no patternRequired as far as I know. Note that the device-dependent
> ports are described in the "allOf" section below, where "required" is
> set per device model.

required:
 - port@0

> 
>>> +
>>> +required:
>>> +  - compatible
>>> +  - reg
>>> +  - interrupts
>>> +  - clocks
>>> +  - clock-names
>>> +  - fsl,blk-ctrl
>>> +  - ports
>>> +
>>> +allOf:
>>> +  - if:
>>> +      properties:
>>> +        compatible:
>>> +          contains:
>>> +            const: fsl,imx8mn-isi
>>> +    then:
>>> +      properties:
>>> +        interrupts:
>>> +          maxItems: 1
>>> +        ports:
>>> +          properties:
>>> +            port@0:
>>> +              description: MIPI CSI-2 RX
>>> +          required:
>>> +            - port@0
>>> +
>>> +  - if:
>>> +      properties:
>>> +        compatible:
>>> +          contains:
>>> +            const: fsl,imx8mp-isi
>>> +    then:
>>> +      properties:
>>> +        interrupts:
>>> +          maxItems: 2
>>
>> You need to describe the items.
> 
> It's one interrupt per pipeline. Can I add the description to the
> generic interrupts property instead of documenting each item
> individually ? Something along the lines of
> 
>   interrupts:
>     description: Processing pipeline interrupts, one per pipeline
> 

This sounds good, thanks!


Best regards,
Krzysztof
Laurent Pinchart July 12, 2022, 2:26 p.m. UTC | #4
Hi Krzysztof,

On Tue, Jul 12, 2022 at 02:49:06PM +0200, Krzysztof Kozlowski wrote:
> On 12/07/2022 12:25, Laurent Pinchart wrote:
> > On Tue, Jul 12, 2022 at 09:49:45AM +0200, Krzysztof Kozlowski wrote:
> >> On 12/07/2022 02:02, Laurent Pinchart wrote:
> >>> The Image Sensing Interface (ISI) combines image processing pipelines
> >>> with DMA engines to process and capture frames originating from a
> >>> variety of sources. The inputs to the ISI go through Pixel Link
> >>> interfaces, and their number and nature is SoC-dependent. They cover
> >>> both capture interfaces (MIPI CSI-2 RX, HDMI RX) and memory inputs.
> >>>
> >>> Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> >>> ---
> >>> Changes since v1:
> >>>
> >>> - Fix compatible string checks in conditional schema
> >>> - Fix interrupts property handling
> >>> ---
> >>>  .../bindings/media/nxp,imx8-isi.yaml          | 148 ++++++++++++++++++
> >>>  1 file changed, 148 insertions(+)
> >>>  create mode 100644 Documentation/devicetree/bindings/media/nxp,imx8-isi.yaml
> >>>
> >>> diff --git a/Documentation/devicetree/bindings/media/nxp,imx8-isi.yaml b/Documentation/devicetree/bindings/media/nxp,imx8-isi.yaml
> >>> new file mode 100644
> >>> index 000000000000..390dfa03026b
> >>> --- /dev/null
> >>> +++ b/Documentation/devicetree/bindings/media/nxp,imx8-isi.yaml
> >>> @@ -0,0 +1,148 @@
> >>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> >>> +%YAML 1.2
> >>> +---
> >>> +$id: http://devicetree.org/schemas/media/nxp,imx8-isi.yaml#
> >>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> >>> +
> >>> +title: i.MX8 Image Sensing Interface
> >>> +
> >>> +maintainers:
> >>> +  - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> >>> +
> >>> +description: |
> >>> +  The Image Sensing Interface (ISI) combines image processing pipelines with
> >>> +  DMA engines to process and capture frames originating from a variety of
> >>> +  sources. The inputs to the ISI go through Pixel Link interfaces, and their
> >>> +  number and nature is SoC-dependent. They cover both capture interfaces (MIPI
> >>> +  CSI-2 RX, HDMI RX, ...) and display engine outputs for writeback support.
> >>> +
> >>> +properties:
> >>> +  compatible:
> >>> +    enum:
> >>> +      - fsl,imx8mn-isi
> >>> +      - fsl,imx8mp-isi
> >>> +
> >>> +  reg:
> >>> +    maxItems: 1
> >>> +
> >>> +  clocks:
> >>> +    items:
> >>> +      - description: The AXI clock
> >>> +      - description: The APB clock
> >>> +      # TODO: Check if the per-channel ipg_proc_clk clocks need to be specified
> >>> +      # as well, in case some SoCs have the ability to control them separately.
> >>> +      # This may be the case of the i.MX8[DQ]X(P)
> >>> +
> >>> +  clock-names:
> >>> +    items:
> >>> +      - const: axi
> >>> +      - const: apb
> >>> +
> >>> +  fsl,blk-ctrl:
> >>> +    $ref: /schemas/types.yaml#/definitions/phandle
> >>> +    description:
> >>> +      A phandle referencing the block control that contains the CSIS to ISI
> >>> +      gasket.
> >>> +
> >>> +  interrupts: true
> >>
> >> Need generic constraints - min/maxItems.
> > 
> > I can't set maxItems here, as the value depends on the compatible
> > string. It's set below as part of the "allOf". I could set minItems to
> > 1, but I don't really see a point in doing so.
> 
> Of course you can, just like all other files could.
> 
> https://elixir.bootlin.com/linux/v5.19-rc6/source/Documentation/devicetree/bindings/clock/samsung,exynos7-clock.yaml#L57

I meant I can't set a fixed maximum, other than the max of all max. Is
there a point in doing do ?

> >>> +
> >>> +  power-domains: true
> >>
> >> Ditto.
> > 
> > I'll fix this one.
> > 
> >>> +
> >>> +  ports:
> >>> +    $ref: /schemas/graph.yaml#/properties/ports
> >>> +    description: |
> >>> +      Ports represent the Pixel Link inputs to the ISI. Their number and
> >>> +      assignment are model-dependent. Each port shall have a single endpoint.
> >>> +
> >>> +    patternProperties:
> >>> +      "^port@[0-9]$":
> >>> +        $ref: /schemas/graph.yaml#/properties/port
> >>> +        unevaluatedProperties: false
> >>> +
> >>> +    unevaluatedProperties: false
> >>
> >> At least one port is always required?
> > 
> > That's a fair assumption I think. How would you express that ? There's
> > no patternRequired as far as I know. Note that the device-dependent
> > ports are described in the "allOf" section below, where "required" is
> > set per device model.
> 
> required:
>  - port@0

What if an SoC has port@1 only, or another port ? It's likely not a
concern in this binding though, so I could add required: - port@0, but
is there a point in doing so if the per-compatible constraints list the
required ports ?

> >>> +
> >>> +required:
> >>> +  - compatible
> >>> +  - reg
> >>> +  - interrupts
> >>> +  - clocks
> >>> +  - clock-names
> >>> +  - fsl,blk-ctrl
> >>> +  - ports
> >>> +
> >>> +allOf:
> >>> +  - if:
> >>> +      properties:
> >>> +        compatible:
> >>> +          contains:
> >>> +            const: fsl,imx8mn-isi
> >>> +    then:
> >>> +      properties:
> >>> +        interrupts:
> >>> +          maxItems: 1
> >>> +        ports:
> >>> +          properties:
> >>> +            port@0:
> >>> +              description: MIPI CSI-2 RX
> >>> +          required:
> >>> +            - port@0
> >>> +
> >>> +  - if:
> >>> +      properties:
> >>> +        compatible:
> >>> +          contains:
> >>> +            const: fsl,imx8mp-isi
> >>> +    then:
> >>> +      properties:
> >>> +        interrupts:
> >>> +          maxItems: 2
> >>
> >> You need to describe the items.
> > 
> > It's one interrupt per pipeline. Can I add the description to the
> > generic interrupts property instead of documenting each item
> > individually ? Something along the lines of
> > 
> >   interrupts:
> >     description: Processing pipeline interrupts, one per pipeline
> 
> This sounds good, thanks!

Thanks, I'll do that then.
Krzysztof Kozlowski July 12, 2022, 2:34 p.m. UTC | #5
On 12/07/2022 16:26, Laurent Pinchart wrote:
> Hi Krzysztof,
> 
> On Tue, Jul 12, 2022 at 02:49:06PM +0200, Krzysztof Kozlowski wrote:
>> On 12/07/2022 12:25, Laurent Pinchart wrote:
>>> On Tue, Jul 12, 2022 at 09:49:45AM +0200, Krzysztof Kozlowski wrote:
>>>> On 12/07/2022 02:02, Laurent Pinchart wrote:
>>>>> The Image Sensing Interface (ISI) combines image processing pipelines
>>>>> with DMA engines to process and capture frames originating from a
>>>>> variety of sources. The inputs to the ISI go through Pixel Link
>>>>> interfaces, and their number and nature is SoC-dependent. They cover
>>>>> both capture interfaces (MIPI CSI-2 RX, HDMI RX) and memory inputs.
>>>>>
>>>>> Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
>>>>> ---
>>>>> Changes since v1:
>>>>>
>>>>> - Fix compatible string checks in conditional schema
>>>>> - Fix interrupts property handling
>>>>> ---
>>>>>  .../bindings/media/nxp,imx8-isi.yaml          | 148 ++++++++++++++++++
>>>>>  1 file changed, 148 insertions(+)
>>>>>  create mode 100644 Documentation/devicetree/bindings/media/nxp,imx8-isi.yaml
>>>>>
>>>>> diff --git a/Documentation/devicetree/bindings/media/nxp,imx8-isi.yaml b/Documentation/devicetree/bindings/media/nxp,imx8-isi.yaml
>>>>> new file mode 100644
>>>>> index 000000000000..390dfa03026b
>>>>> --- /dev/null
>>>>> +++ b/Documentation/devicetree/bindings/media/nxp,imx8-isi.yaml
>>>>> @@ -0,0 +1,148 @@
>>>>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>>>>> +%YAML 1.2
>>>>> +---
>>>>> +$id: http://devicetree.org/schemas/media/nxp,imx8-isi.yaml#
>>>>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>>>>> +
>>>>> +title: i.MX8 Image Sensing Interface
>>>>> +
>>>>> +maintainers:
>>>>> +  - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
>>>>> +
>>>>> +description: |
>>>>> +  The Image Sensing Interface (ISI) combines image processing pipelines with
>>>>> +  DMA engines to process and capture frames originating from a variety of
>>>>> +  sources. The inputs to the ISI go through Pixel Link interfaces, and their
>>>>> +  number and nature is SoC-dependent. They cover both capture interfaces (MIPI
>>>>> +  CSI-2 RX, HDMI RX, ...) and display engine outputs for writeback support.
>>>>> +
>>>>> +properties:
>>>>> +  compatible:
>>>>> +    enum:
>>>>> +      - fsl,imx8mn-isi
>>>>> +      - fsl,imx8mp-isi
>>>>> +
>>>>> +  reg:
>>>>> +    maxItems: 1
>>>>> +
>>>>> +  clocks:
>>>>> +    items:
>>>>> +      - description: The AXI clock
>>>>> +      - description: The APB clock
>>>>> +      # TODO: Check if the per-channel ipg_proc_clk clocks need to be specified
>>>>> +      # as well, in case some SoCs have the ability to control them separately.
>>>>> +      # This may be the case of the i.MX8[DQ]X(P)
>>>>> +
>>>>> +  clock-names:
>>>>> +    items:
>>>>> +      - const: axi
>>>>> +      - const: apb
>>>>> +
>>>>> +  fsl,blk-ctrl:
>>>>> +    $ref: /schemas/types.yaml#/definitions/phandle
>>>>> +    description:
>>>>> +      A phandle referencing the block control that contains the CSIS to ISI
>>>>> +      gasket.
>>>>> +
>>>>> +  interrupts: true
>>>>
>>>> Need generic constraints - min/maxItems.
>>>
>>> I can't set maxItems here, as the value depends on the compatible
>>> string. It's set below as part of the "allOf". I could set minItems to
>>> 1, but I don't really see a point in doing so.
>>
>> Of course you can, just like all other files could.
>>
>> https://elixir.bootlin.com/linux/v5.19-rc6/source/Documentation/devicetree/bindings/clock/samsung,exynos7-clock.yaml#L57
> 
> I meant I can't set a fixed maximum, other than the max of all max. Is
> there a point in doing do ?

Yes, that's the practice. makes code easier to read and notice all
constraints.


Best regards,
Krzysztof