Message ID | 20250131-8qxp_camera-v1-0-319402ab606a@nxp.com |
---|---|
Headers | show |
Series | media: imx8: add camera support | expand |
On Fri, Jan 31, 2025 at 04:33:46PM -0500, Frank Li wrote: > Add MIPI CSI phy binding doc for i.MX8QXP, i.MX8QM and i.MX8ULP. > > Signed-off-by: Frank Li <Frank.Li@nxp.com> > --- > .../bindings/phy/fsl,imx8qxp-mipi-cphy.yaml | 53 ++++++++++++++++++++++ > 1 file changed, 53 insertions(+) > > diff --git a/Documentation/devicetree/bindings/phy/fsl,imx8qxp-mipi-cphy.yaml b/Documentation/devicetree/bindings/phy/fsl,imx8qxp-mipi-cphy.yaml > new file mode 100644 > index 0000000000000..c6cbedd9ed114 > --- /dev/null > +++ b/Documentation/devicetree/bindings/phy/fsl,imx8qxp-mipi-cphy.yaml > @@ -0,0 +1,53 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/phy/fsl,imx8qxp-mipi-cphy.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Freescale i.MX8 SoC MIPI CSI PHY > + > +maintainers: > + - Frank Li <Frank.Li@nxp.com> > + > +properties: > + "#phy-cells": > + const: 0 > + > + compatible: > + enum: > + - fsl,imx8qxp-mipi-cphy > + - fsl,imx8ulp-mipi-cphy Where's imx8qm? > + > + reg: > + maxItems: 1 > + > + power-domains: > + maxItems: 1 > + > +required: > + - "#phy-cells" > + - compatible > + > +allOf: > + - if: > + properties: > + compatible: > + contains: > + enum: > + - fsl,imx8qxp-mipi-cphy > + then: > + required: > + - reg How is the device accessed with no registers? > + - power-domains > + > +additionalProperties: false > + > +examples: > + - | > + phy@58221000 { > + compatible = "fsl,imx8qxp-mipi-cphy"; > + reg = <0x58221000 0x10000>; > + #phy-cells = <0>; > + power-domains = <&pd 0>; > + }; > + > > -- > 2.34.1 >
On Fri, Jan 31, 2025 at 04:33:48PM -0500, Frank Li wrote: > Add binding doc for reset controller of i.MX8QM and i.MX8QXP, which use > System Controller Firmware(SCU) reset some peripherals, such as CSI. > > Signed-off-by: Frank Li <Frank.Li@nxp.com> > --- > .../devicetree/bindings/reset/fsl,imx-scu.yaml | 35 ++++++++++++++++++++++ > 1 file changed, 35 insertions(+) > > diff --git a/Documentation/devicetree/bindings/reset/fsl,imx-scu.yaml b/Documentation/devicetree/bindings/reset/fsl,imx-scu.yaml > new file mode 100644 > index 0000000000000..6046df8723262 > --- /dev/null > +++ b/Documentation/devicetree/bindings/reset/fsl,imx-scu.yaml > @@ -0,0 +1,35 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/reset/fsl,imx-scu.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Freescale i.MX8 SCU Reset > + > +maintainers: > + - Frank Li <Frank.Li@nxp.com> > + > +description: > + i.MX8QM and i.MX8QXP System Controller Firmware(SCU) provide reset for > + some peripheral. > + > +properties: > + compatible: > + enum: > + - fsl,imx-scu-reset > + > + '#reset-cells': > + const: 1 > + > +required: > + - compatible > + - '#reset-cells' > + > +additionalProperties: false > + > +examples: > + - | > + reset-controller { > + compatible = "fsl,imx-scu-reset"; > + #reset-cells = <1>; This should just be a property in the parent SCU node. You don't need a node for every provider. We need a binding for the SCU as a whole. Rob
On Fri, Jan 31, 2025 at 04:33:50PM -0500, Frank Li wrote: > From: Robert Chiras <robert.chiras@nxp.com> > > Add compatible strings for i.MX8QM and i.MX8QXP platforms. > > Increase the number of max interrupts and clock to 8. i.MX8QM have 8 > channels and i.MX8QXP have 5 channels. Each channel requires one clock > source and interrupt. > > Remove fsl,blk-ctrl from required list because i.MX8Q needn't it. > > i.MX8QM use port@2 and port@3. i.MX8QXP use port@2 and port@6. > > Keep the same restriction for the other platform. > > Signed-off-by: Robert Chiras <robert.chiras@nxp.com> > Reviewed-by: Robby Cai <robby.cai@nxp.com> > Reviewed-by: Mirela Rabulea <mirela.rabulea@nxp.com> > Reviewed-by: Laurentiu Palcu <laurentiu.palcu@oss.nxp.com> > Signed-off-by: Frank Li <Frank.Li@nxp.com> > --- > .../devicetree/bindings/media/nxp,imx8-isi.yaml | 87 +++++++++++++++++++--- > 1 file changed, 75 insertions(+), 12 deletions(-) > > diff --git a/Documentation/devicetree/bindings/media/nxp,imx8-isi.yaml b/Documentation/devicetree/bindings/media/nxp,imx8-isi.yaml > index f43b91984f015..b713c8ba79e39 100644 > --- a/Documentation/devicetree/bindings/media/nxp,imx8-isi.yaml > +++ b/Documentation/devicetree/bindings/media/nxp,imx8-isi.yaml > @@ -21,6 +21,8 @@ properties: > enum: > - fsl,imx8mn-isi > - fsl,imx8mp-isi > + - fsl,imx8qm-isi > + - fsl,imx8qxp-isi > - fsl,imx8ulp-isi > - fsl,imx93-isi > > @@ -28,17 +30,12 @@ properties: > maxItems: 1 > > clocks: > - items: > - - description: The AXI clock > - - description: The APB clock > - # TODO: Check if the per-channel ipg_proc_clk clocks need to be specified > - # as well, in case some SoCs have the ability to control them separately. > - # This may be the case of the i.MX8[DQ]X(P) > + minItems: 1 > + maxItems: 8 Isn't the minimum still 2? > > clock-names: > - items: > - - const: axi > - - const: apb > + minItems: 1 > + maxItems: 8 > > fsl,blk-ctrl: > $ref: /schemas/types.yaml#/definitions/phandle > @@ -49,10 +46,11 @@ properties: > interrupts: > description: Processing pipeline interrupts, one per pipeline > minItems: 1 > - maxItems: 2 > + maxItems: 8 > > power-domains: > - maxItems: 1 > + minItems: 1 > + maxItems: 8 > > ports: > $ref: /schemas/graph.yaml#/properties/ports > @@ -66,7 +64,6 @@ required: > - interrupts > - clocks > - clock-names > - - fsl,blk-ctrl > - ports > > allOf: > @@ -79,9 +76,17 @@ allOf: > - fsl,imx8ulp-isi > - fsl,imx93-isi > then: > + required: > + - fsl,blk-ctrl > properties: > interrupts: > maxItems: 1 > + clocks: > + maxItems: 2 > + clock-names: > + items: > + - const: axi > + - const: apb > ports: > properties: > port@0: > @@ -96,9 +101,17 @@ allOf: > contains: > const: fsl,imx8mp-isi > then: > + required: > + - fsl,blk-ctrl > properties: > interrupts: > maxItems: 2 > + clocks: > + maxItems: 2 > + clock-names: > + items: > + - const: axi > + - const: apb > ports: > properties: > port@0: > @@ -109,6 +122,56 @@ allOf: > - port@0 > - port@1 > > + - if: > + properties: > + compatible: > + contains: > + const: fsl,imx8qm-isi > + then: > + properties: > + clocks: > + minItems: 8 > + clock-names: > + items: > + pattern: "^per[0-7]" > + interrupts: > + minItems: 8 > + ports: > + properties: > + port@2: > + description: MIPI CSI-2 RX 0 > + port@3: > + description: MIPI CSI-2 RX 1 > + required: > + - port@2 > + - port@3 This schema is completely missing proper schemas for port nodes. It needs to reference the port schema for each port. That should be at the top-level. I think this addition is borderline whether it should be its own schema doc. The if/then schemas are larger than the main part. The ports are not even the same. Rob
On Mon, Feb 03, 2025 at 04:02:30PM -0600, Rob Herring wrote: > On Fri, Jan 31, 2025 at 04:33:46PM -0500, Frank Li wrote: > > Add MIPI CSI phy binding doc for i.MX8QXP, i.MX8QM and i.MX8ULP. > > > > Signed-off-by: Frank Li <Frank.Li@nxp.com> > > --- > > .../bindings/phy/fsl,imx8qxp-mipi-cphy.yaml | 53 ++++++++++++++++++++++ > > 1 file changed, 53 insertions(+) > > > > diff --git a/Documentation/devicetree/bindings/phy/fsl,imx8qxp-mipi-cphy.yaml b/Documentation/devicetree/bindings/phy/fsl,imx8qxp-mipi-cphy.yaml > > new file mode 100644 > > index 0000000000000..c6cbedd9ed114 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/phy/fsl,imx8qxp-mipi-cphy.yaml > > @@ -0,0 +1,53 @@ > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/phy/fsl,imx8qxp-mipi-cphy.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: Freescale i.MX8 SoC MIPI CSI PHY > > + > > +maintainers: > > + - Frank Li <Frank.Li@nxp.com> > > + > > +properties: > > + "#phy-cells": > > + const: 0 > > + > > + compatible: > > + enum: > > + - fsl,imx8qxp-mipi-cphy > > + - fsl,imx8ulp-mipi-cphy > > Where's imx8qm? Sorry, missed. dts use fsl,imx8qxp-mipi-cphy at 8qm, so I have not found it by DTB_CHECK. > > > + > > + reg: > > + maxItems: 1 > > + > > + power-domains: > > + maxItems: 1 > > + > > +required: > > + - "#phy-cells" > > + - compatible > > + > > +allOf: > > + - if: > > + properties: > > + compatible: > > + contains: > > + enum: > > + - fsl,imx8qxp-mipi-cphy > > + then: > > + required: > > + - reg > > How is the device accessed with no registers? 8ulp boudle other function's register. csr_regs: csr@2dad0000 { compatible = "8upl-csr", "syscon", "simple-mfd"; reg = <0x2dad0000 0x10000>; clocks = <&pcc5 IMX8ULP_CLK_CSI_REGS>; csr_regs_rst: reset-controller { compatible = "nxp,imx8ulp-csr-regs-reset"; ... }; mipi-phy { compatible = "fsl,imx8ulp-mipi-cphy"; ... }; }; I have not 8ulp to do test now and this serial are already quite big. I plan update later. Just put a fsl,imx8ulp-mipi-cphy here, because it is quite similar with fsl,imx8qxp-mipi-cphy Frank > > > + - power-domains > > + > > +additionalProperties: false > > + > > +examples: > > + - | > > + phy@58221000 { > > + compatible = "fsl,imx8qxp-mipi-cphy"; > > + reg = <0x58221000 0x10000>; > > + #phy-cells = <0>; > > + power-domains = <&pd 0>; > > + }; > > + > > > > -- > > 2.34.1 > >
Add SCU reset driver for i.MX8QM/i.MX8QXP. Add phy driver for mipi csi phy. Update binding doc. Update driver for imx8qxp and imx8qm. Add dts files for it. To: Vinod Koul <vkoul@kernel.org> To: Kishon Vijay Abraham I <kishon@kernel.org> To: Rob Herring <robh@kernel.org> To: Krzysztof Kozlowski <krzk+dt@kernel.org> To: Conor Dooley <conor+dt@kernel.org> To: Shawn Guo <shawnguo@kernel.org> To: Sascha Hauer <s.hauer@pengutronix.de> To: Pengutronix Kernel Team <kernel@pengutronix.de> To: Fabio Estevam <festevam@gmail.com> To: Philipp Zabel <p.zabel@pengutronix.de> To: Laurent Pinchart <laurent.pinchart@ideasonboard.com> To: Mauro Carvalho Chehab <mchehab@kernel.org> To: Rui Miguel Silva <rmfrfs@gmail.com> To: Martin Kepplinger <martink@posteo.de> To: Purism Kernel Team <kernel@puri.sm> Cc: linux-phy@lists.infradead.org Cc: devicetree@vger.kernel.org Cc: imx@lists.linux.dev Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Cc: linux-media@vger.kernel.org Cc: Guoniu.zhou <guoniu.zhou@nxp.com> Cc: Robby Cai <robby.cai@nxp.com> Cc: Robert Chiras <robert.chiras@nxp.com> Signed-off-by: Frank Li <Frank.Li@nxp.com> --- Frank Li (10): dt-bindings: phy: Add MIPI CSI PHY for i.MX8Q phy: freescale: Add MIPI CSI PHY driver for i.MX8Q dt-bindings: reset: Add reset controller for i.MX8QM and i.MX8QXP reset: imx: Add SCU reset driver for i.MX8QXP and i.MX8QM media: nxp: imx8-isi: Allow num_sources to be greater than num_sink media: imx8mq-mipi-csi2: Add support for i.MX8QM arm64: dts: imx8: add capture controller for i.MX8's img subsystem arm64: dts: imx8qm: add 24MHz clock-xtal24m arm64: dts: imx8q: add linux,cma node for imx8qm-mek and imx8qxp-mek arm64: dts: imx8q: add camera ov5640 support for imx8qm-mek and imx8qxp-mek Guoniu.zhou (1): media: imx8mq-mipi-csi2: Add imx8mq_plat_data for different compatible strings Robert Chiras (3): media: dt-bindings: nxp,imx8-isi: Add i.MX8Q ISI compatible strings media: imx8-isi: Add support for i.MX8QM and i.MX8QXP media: dt-bindings: nxp,imx8mq-mipi-csi2: Add i.MX8QM compatible strings .../devicetree/bindings/media/nxp,imx8-isi.yaml | 87 ++++- .../bindings/media/nxp,imx8mq-mipi-csi2.yaml | 30 +- .../bindings/phy/fsl,imx8qxp-mipi-cphy.yaml | 53 +++ .../devicetree/bindings/reset/fsl,imx-scu.yaml | 35 ++ arch/arm64/boot/dts/freescale/Makefile | 12 + arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi | 396 +++++++++++++++++++++ .../boot/dts/freescale/imx8qm-mek-ov5640-csi0.dtso | 93 +++++ .../boot/dts/freescale/imx8qm-mek-ov5640-csi1.dtso | 93 +++++ arch/arm64/boot/dts/freescale/imx8qm-mek.dts | 60 ++++ arch/arm64/boot/dts/freescale/imx8qm-ss-img.dtsi | 37 ++ arch/arm64/boot/dts/freescale/imx8qm.dtsi | 7 + .../boot/dts/freescale/imx8qxp-mek-ov5640-csi.dtso | 92 +++++ arch/arm64/boot/dts/freescale/imx8qxp-mek.dts | 44 +++ arch/arm64/boot/dts/freescale/imx8qxp-ss-img.dtsi | 60 ++++ .../media/platform/nxp/imx8-isi/imx8-isi-core.c | 47 +++ .../media/platform/nxp/imx8-isi/imx8-isi-core.h | 2 + .../platform/nxp/imx8-isi/imx8-isi-crossbar.c | 8 +- drivers/media/platform/nxp/imx8mq-mipi-csi2.c | 106 +++++- drivers/phy/freescale/Kconfig | 9 + drivers/phy/freescale/Makefile | 1 + drivers/phy/freescale/phy-fsl-imx8q-mipi-cphy.c | 254 +++++++++++++ drivers/reset/Kconfig | 7 + drivers/reset/Makefile | 1 + drivers/reset/reset-imx-scu.c | 101 ++++++ 24 files changed, 1603 insertions(+), 32 deletions(-) --- base-commit: 76d45eb8b88447ee4ed38aba6b2141cca2811005 change-id: 20250114-8qxp_camera-c1af5749d304 Best regards, --- Frank Li <Frank.Li@nxp.com>