From patchwork Mon May 24 11:08:50 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomi Valkeinen X-Patchwork-Id: 447643 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 92A9EC04FF3 for ; Mon, 24 May 2021 11:09:40 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 7728161002 for ; Mon, 24 May 2021 11:09:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232627AbhEXLLH (ORCPT ); Mon, 24 May 2021 07:11:07 -0400 Received: from perceval.ideasonboard.com ([213.167.242.64]:33754 "EHLO perceval.ideasonboard.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232709AbhEXLLD (ORCPT ); Mon, 24 May 2021 07:11:03 -0400 Received: from deskari.lan (91-157-208-71.elisa-laajakaista.fi [91.157.208.71]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id B68C917C6; Mon, 24 May 2021 13:09:26 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1621854567; bh=15tmuNgLT+LUfKOrCiK+hETAjajsXfXxdzzhEbFOqas=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=aZ2+X3vBJ7HrCC1HWhqaYtmsCxPDpcUkCNaai64nxkZ9lhQhSmQD7fRP/HYwYGebq +6KWHV8tosDIGUzcbJqSBHNQWebkLZhmUngjS7vUBNZ31f5TrYerCfJiCF9Hrf+grO F3ZYJpGBEDPk9ixza0lfmbxtk/FGgSqRBWkhdTq8= From: Tomi Valkeinen To: Laurent Pinchart , Pratyush Yadav , Lokesh Vutla , linux-media@vger.kernel.org Cc: Tomi Valkeinen Subject: [PATCH v3 19/38] media: ti-vpe: cal: add cal_ctx_wr_dma_enable and fix a race Date: Mon, 24 May 2021 14:08:50 +0300 Message-Id: <20210524110909.672432-20-tomi.valkeinen@ideasonboard.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210524110909.672432-1-tomi.valkeinen@ideasonboard.com> References: <20210524110909.672432-1-tomi.valkeinen@ideasonboard.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org I have not noticed any errors due to this, but the DMA configuration looks racy. Setting the DMA mode bitfield in CAL_WR_DMA_CTRL supposedly enables the DMA. However, the driver currently a) continues configuring the DMA after setting the mode, and b) enables the DMA interrupts only after setting the mode. This probably doesn't cause any issues as there should be no data coming in to the DMA yet, but it's still better to fix this. Add a new function, cal_ctx_wr_dma_enable(), to set the DMA mode field, and call that function only after the DMA config and the irq enabling has been done. Signed-off-by: Tomi Valkeinen Reviewed-by: Laurent Pinchart --- drivers/media/platform/ti-vpe/cal.c | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/drivers/media/platform/ti-vpe/cal.c b/drivers/media/platform/ti-vpe/cal.c index c1a6e23ff713..778bef9bbdc4 100644 --- a/drivers/media/platform/ti-vpe/cal.c +++ b/drivers/media/platform/ti-vpe/cal.c @@ -409,8 +409,6 @@ static void cal_ctx_wr_dma_config(struct cal_ctx *ctx) CAL_WR_DMA_CTRL_YSIZE_MASK); cal_set_field(&val, CAL_WR_DMA_CTRL_DTAG_PIX_DAT, CAL_WR_DMA_CTRL_DTAG_MASK); - cal_set_field(&val, CAL_WR_DMA_CTRL_MODE_CONST, - CAL_WR_DMA_CTRL_MODE_MASK); cal_set_field(&val, CAL_WR_DMA_CTRL_PATTERN_LINEAR, CAL_WR_DMA_CTRL_PATTERN_MASK); cal_set_field(&val, 1, CAL_WR_DMA_CTRL_STALL_RD_MASK); @@ -442,6 +440,15 @@ void cal_ctx_set_dma_addr(struct cal_ctx *ctx, dma_addr_t addr) cal_write(ctx->cal, CAL_WR_DMA_ADDR(ctx->dma_ctx), addr); } +static void cal_ctx_wr_dma_enable(struct cal_ctx *ctx) +{ + u32 val = cal_read(ctx->cal, CAL_WR_DMA_CTRL(ctx->dma_ctx)); + + cal_set_field(&val, CAL_WR_DMA_CTRL_MODE_CONST, + CAL_WR_DMA_CTRL_MODE_MASK); + cal_write(ctx->cal, CAL_WR_DMA_CTRL(ctx->dma_ctx), val); +} + static void cal_ctx_wr_dma_disable(struct cal_ctx *ctx) { u32 val = cal_read(ctx->cal, CAL_WR_DMA_CTRL(ctx->dma_ctx)); @@ -500,6 +507,8 @@ void cal_ctx_start(struct cal_ctx *ctx) CAL_HL_IRQ_WDMA_END_MASK(ctx->dma_ctx)); cal_write(ctx->cal, CAL_HL_IRQENABLE_SET(2), CAL_HL_IRQ_WDMA_START_MASK(ctx->dma_ctx)); + + cal_ctx_wr_dma_enable(ctx); } void cal_ctx_stop(struct cal_ctx *ctx)