diff mbox series

[v2,11/18] dmaengine: ti: k3-psil-j721e: Add entry for CSI2RX

Message ID 20210526152308.16525-12-p.yadav@ti.com
State Accepted
Commit 5e70a09c54c4d7ce8c8a573005889a5301cda4c4
Headers show
Series CSI2RX support on J721E | expand

Commit Message

Pratyush Yadav May 26, 2021, 3:23 p.m. UTC
The CSI2RX subsystem uses PSI-L DMA to transfer frames to memory. It can
have up to 32 threads but the current driver only supports using one. So
add an entry for that one thread.

Signed-off-by: Pratyush Yadav <p.yadav@ti.com>

---

Changes in v2:
- Add all 64 threads, instead of having only the one thread being
  currently used by the driver.

 drivers/dma/ti/k3-psil-j721e.c | 73 ++++++++++++++++++++++++++++++++++
 1 file changed, 73 insertions(+)

Comments

Péter Ujfalusi May 31, 2021, 6:51 a.m. UTC | #1
On 26/05/2021 18:23, Pratyush Yadav wrote:
> The CSI2RX subsystem uses PSI-L DMA to transfer frames to memory. It can

> have up to 32 threads but the current driver only supports using one. So

> add an entry for that one thread.

> 

> Signed-off-by: Pratyush Yadav <p.yadav@ti.com>

> 

> ---

> 

> Changes in v2:

> - Add all 64 threads, instead of having only the one thread being

>   currently used by the driver.


How many threads CSI2RX have? 32 (as per commit message) or 64? If I
recall right, it is 32.

> 

>  drivers/dma/ti/k3-psil-j721e.c | 73 ++++++++++++++++++++++++++++++++++

>  1 file changed, 73 insertions(+)

> 

> diff --git a/drivers/dma/ti/k3-psil-j721e.c b/drivers/dma/ti/k3-psil-j721e.c

> index 7580870ed746..34e3fc565a37 100644

> --- a/drivers/dma/ti/k3-psil-j721e.c

> +++ b/drivers/dma/ti/k3-psil-j721e.c

> @@ -58,6 +58,14 @@

>  		},					\

>  	}

>  

> +#define PSIL_CSI2RX(x)					\

> +	{						\

> +		.thread_id = x,				\

> +		.ep_config = {				\

> +			.ep_type = PSIL_EP_NATIVE,	\

> +		},					\

> +	}

> +

>  /* PSI-L source thread IDs, used for RX (DMA_DEV_TO_MEM) */

>  static struct psil_ep j721e_src_ep_map[] = {

>  	/* SA2UL */

> @@ -138,6 +146,71 @@ static struct psil_ep j721e_src_ep_map[] = {

>  	PSIL_PDMA_XY_PKT(0x4707),

>  	PSIL_PDMA_XY_PKT(0x4708),

>  	PSIL_PDMA_XY_PKT(0x4709),

> +	/* CSI2RX */

> +	PSIL_CSI2RX(0x4940),

> +	PSIL_CSI2RX(0x4941),

> +	PSIL_CSI2RX(0x4942),

> +	PSIL_CSI2RX(0x4943),

> +	PSIL_CSI2RX(0x4944),

> +	PSIL_CSI2RX(0x4945),

> +	PSIL_CSI2RX(0x4946),

> +	PSIL_CSI2RX(0x4947),

> +	PSIL_CSI2RX(0x4948),

> +	PSIL_CSI2RX(0x4949),

> +	PSIL_CSI2RX(0x494a),

> +	PSIL_CSI2RX(0x494b),

> +	PSIL_CSI2RX(0x494c),

> +	PSIL_CSI2RX(0x494d),

> +	PSIL_CSI2RX(0x494e),

> +	PSIL_CSI2RX(0x494f),

> +	PSIL_CSI2RX(0x4950),

> +	PSIL_CSI2RX(0x4951),

> +	PSIL_CSI2RX(0x4952),

> +	PSIL_CSI2RX(0x4953),

> +	PSIL_CSI2RX(0x4954),

> +	PSIL_CSI2RX(0x4955),

> +	PSIL_CSI2RX(0x4956),

> +	PSIL_CSI2RX(0x4957),

> +	PSIL_CSI2RX(0x4958),

> +	PSIL_CSI2RX(0x4959),

> +	PSIL_CSI2RX(0x495a),

> +	PSIL_CSI2RX(0x495b),

> +	PSIL_CSI2RX(0x495c),

> +	PSIL_CSI2RX(0x495d),

> +	PSIL_CSI2RX(0x495e),

> +	PSIL_CSI2RX(0x495f),

> +	PSIL_CSI2RX(0x4960),

> +	PSIL_CSI2RX(0x4961),

> +	PSIL_CSI2RX(0x4962),

> +	PSIL_CSI2RX(0x4963),

> +	PSIL_CSI2RX(0x4964),

> +	PSIL_CSI2RX(0x4965),

> +	PSIL_CSI2RX(0x4966),

> +	PSIL_CSI2RX(0x4967),

> +	PSIL_CSI2RX(0x4968),

> +	PSIL_CSI2RX(0x4969),

> +	PSIL_CSI2RX(0x496a),

> +	PSIL_CSI2RX(0x496b),

> +	PSIL_CSI2RX(0x496c),

> +	PSIL_CSI2RX(0x496d),

> +	PSIL_CSI2RX(0x496e),

> +	PSIL_CSI2RX(0x496f),

> +	PSIL_CSI2RX(0x4970),

> +	PSIL_CSI2RX(0x4971),

> +	PSIL_CSI2RX(0x4972),

> +	PSIL_CSI2RX(0x4973),

> +	PSIL_CSI2RX(0x4974),

> +	PSIL_CSI2RX(0x4975),

> +	PSIL_CSI2RX(0x4976),

> +	PSIL_CSI2RX(0x4977),

> +	PSIL_CSI2RX(0x4978),

> +	PSIL_CSI2RX(0x4979),

> +	PSIL_CSI2RX(0x497a),

> +	PSIL_CSI2RX(0x497b),

> +	PSIL_CSI2RX(0x497c),

> +	PSIL_CSI2RX(0x497d),

> +	PSIL_CSI2RX(0x497e),

> +	PSIL_CSI2RX(0x497f),

>  	/* CPSW9 */

>  	PSIL_ETHERNET(0x4a00),

>  	/* CPSW0 */

> 


-- 
Péter
Pratyush Yadav May 31, 2021, 9:16 a.m. UTC | #2
On 31/05/21 09:51AM, Péter Ujfalusi wrote:
> 
> 
> On 26/05/2021 18:23, Pratyush Yadav wrote:
> > The CSI2RX subsystem uses PSI-L DMA to transfer frames to memory. It can
> > have up to 32 threads but the current driver only supports using one. So
> > add an entry for that one thread.
> > 
> > Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
> > 
> > ---
> > 
> > Changes in v2:
> > - Add all 64 threads, instead of having only the one thread being
> >   currently used by the driver.
> 
> How many threads CSI2RX have? 32 (as per commit message) or 64? If I
> recall right, it is 32.

Ah, sorry I forgot to update the commit message. Each instance of CSI2RX 
has 32 threads, and J721E has 2 instances. So 64 threads total.
diff mbox series

Patch

diff --git a/drivers/dma/ti/k3-psil-j721e.c b/drivers/dma/ti/k3-psil-j721e.c
index 7580870ed746..34e3fc565a37 100644
--- a/drivers/dma/ti/k3-psil-j721e.c
+++ b/drivers/dma/ti/k3-psil-j721e.c
@@ -58,6 +58,14 @@ 
 		},					\
 	}
 
+#define PSIL_CSI2RX(x)					\
+	{						\
+		.thread_id = x,				\
+		.ep_config = {				\
+			.ep_type = PSIL_EP_NATIVE,	\
+		},					\
+	}
+
 /* PSI-L source thread IDs, used for RX (DMA_DEV_TO_MEM) */
 static struct psil_ep j721e_src_ep_map[] = {
 	/* SA2UL */
@@ -138,6 +146,71 @@  static struct psil_ep j721e_src_ep_map[] = {
 	PSIL_PDMA_XY_PKT(0x4707),
 	PSIL_PDMA_XY_PKT(0x4708),
 	PSIL_PDMA_XY_PKT(0x4709),
+	/* CSI2RX */
+	PSIL_CSI2RX(0x4940),
+	PSIL_CSI2RX(0x4941),
+	PSIL_CSI2RX(0x4942),
+	PSIL_CSI2RX(0x4943),
+	PSIL_CSI2RX(0x4944),
+	PSIL_CSI2RX(0x4945),
+	PSIL_CSI2RX(0x4946),
+	PSIL_CSI2RX(0x4947),
+	PSIL_CSI2RX(0x4948),
+	PSIL_CSI2RX(0x4949),
+	PSIL_CSI2RX(0x494a),
+	PSIL_CSI2RX(0x494b),
+	PSIL_CSI2RX(0x494c),
+	PSIL_CSI2RX(0x494d),
+	PSIL_CSI2RX(0x494e),
+	PSIL_CSI2RX(0x494f),
+	PSIL_CSI2RX(0x4950),
+	PSIL_CSI2RX(0x4951),
+	PSIL_CSI2RX(0x4952),
+	PSIL_CSI2RX(0x4953),
+	PSIL_CSI2RX(0x4954),
+	PSIL_CSI2RX(0x4955),
+	PSIL_CSI2RX(0x4956),
+	PSIL_CSI2RX(0x4957),
+	PSIL_CSI2RX(0x4958),
+	PSIL_CSI2RX(0x4959),
+	PSIL_CSI2RX(0x495a),
+	PSIL_CSI2RX(0x495b),
+	PSIL_CSI2RX(0x495c),
+	PSIL_CSI2RX(0x495d),
+	PSIL_CSI2RX(0x495e),
+	PSIL_CSI2RX(0x495f),
+	PSIL_CSI2RX(0x4960),
+	PSIL_CSI2RX(0x4961),
+	PSIL_CSI2RX(0x4962),
+	PSIL_CSI2RX(0x4963),
+	PSIL_CSI2RX(0x4964),
+	PSIL_CSI2RX(0x4965),
+	PSIL_CSI2RX(0x4966),
+	PSIL_CSI2RX(0x4967),
+	PSIL_CSI2RX(0x4968),
+	PSIL_CSI2RX(0x4969),
+	PSIL_CSI2RX(0x496a),
+	PSIL_CSI2RX(0x496b),
+	PSIL_CSI2RX(0x496c),
+	PSIL_CSI2RX(0x496d),
+	PSIL_CSI2RX(0x496e),
+	PSIL_CSI2RX(0x496f),
+	PSIL_CSI2RX(0x4970),
+	PSIL_CSI2RX(0x4971),
+	PSIL_CSI2RX(0x4972),
+	PSIL_CSI2RX(0x4973),
+	PSIL_CSI2RX(0x4974),
+	PSIL_CSI2RX(0x4975),
+	PSIL_CSI2RX(0x4976),
+	PSIL_CSI2RX(0x4977),
+	PSIL_CSI2RX(0x4978),
+	PSIL_CSI2RX(0x4979),
+	PSIL_CSI2RX(0x497a),
+	PSIL_CSI2RX(0x497b),
+	PSIL_CSI2RX(0x497c),
+	PSIL_CSI2RX(0x497d),
+	PSIL_CSI2RX(0x497e),
+	PSIL_CSI2RX(0x497f),
 	/* CPSW9 */
 	PSIL_ETHERNET(0x4a00),
 	/* CPSW0 */