[RFC,v4,06/12] ARM: dts: bcm2711: Add unicam CSI nodes

Add both MIPI CSI-2 nodes in the core bcm2711 tree. Use the 3-cells
interrupt declaration, corresponding clocks and default as disabled.

Signed-off-by: Jean-Michel Hautbois <jeanmichel.hautbois@ideasonboard.com>
---
 arch/arm/boot/dts/bcm2711-rpi.dtsi | 15 +++++++++++++++
 arch/arm/boot/dts/bcm2711.dtsi     | 16 ++++++++++++++++
 2 files changed, 31 insertions(+)

Hi Jean-Michel,

Thank you for the patch.

On Thu, Feb 03, 2022 at 06:50:03PM +0100, Jean-Michel Hautbois wrote:
> Add both MIPI CSI-2 nodes in the core bcm2711 tree. Use the 3-cells
> interrupt declaration, corresponding clocks and default as disabled.
> 
> Signed-off-by: Jean-Michel Hautbois <jeanmichel.hautbois@ideasonboard.com>
> ---
>  arch/arm/boot/dts/bcm2711-rpi.dtsi | 15 +++++++++++++++
>  arch/arm/boot/dts/bcm2711.dtsi     | 16 ++++++++++++++++
>  2 files changed, 31 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/bcm2711-rpi.dtsi b/arch/arm/boot/dts/bcm2711-rpi.dtsi
> index ca266c5d9f9b..97ee494891af 100644
> --- a/arch/arm/boot/dts/bcm2711-rpi.dtsi
> +++ b/arch/arm/boot/dts/bcm2711-rpi.dtsi
> @@ -1,6 +1,7 @@
>  // SPDX-License-Identifier: GPL-2.0
>  #include "bcm2835-rpi.dtsi"
>  
> +#include <dt-bindings/power/raspberrypi-power.h>
>  #include <dt-bindings/reset/raspberrypi,firmware-reset.h>
>  
>  / {
> @@ -18,6 +19,20 @@ aliases {
>  	};
>  };
>  
> +&csi0 {
> +	clocks = <&clocks BCM2835_CLOCK_CAM0>,
> +		 <&firmware_clocks 4>;
> +	clock-names = "lp", "vpu";
> +	power-domains = <&power RPI_POWER_DOMAIN_UNICAM0>;
> +};
> +
> +&csi1 {
> +	clocks = <&clocks BCM2835_CLOCK_CAM1>,
> +		 <&firmware_clocks 4>;
> +	clock-names = "lp", "vpu";
> +	power-domains = <&power RPI_POWER_DOMAIN_UNICAM1>;
> +};
> +
>  &firmware {
>  	firmware_clocks: clocks {
>  		compatible = "raspberrypi,firmware-clocks";
> diff --git a/arch/arm/boot/dts/bcm2711.dtsi b/arch/arm/boot/dts/bcm2711.dtsi
> index dff18fc9a906..312a74601839 100644
> --- a/arch/arm/boot/dts/bcm2711.dtsi
> +++ b/arch/arm/boot/dts/bcm2711.dtsi
> @@ -293,6 +293,22 @@ hvs: hvs@7e400000 {
>  			interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
>  		};
>  
> +		csi0: csi@7e800000 {
> +			compatible = "brcm,bcm2835-unicam";
> +			reg = <0x7e800000 0x800>,
> +			      <0x7e802000 0x4>;

You should add reg-names here.

> +			interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
> +			status = "disabled";

And I'd add
			port {
			};

too, as it's listed as required in the bindings.

The two comments apply to csi1 too.

With these fixed,

Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>

> +		};
> +
> +		csi1: csi@7e801000 {
> +			compatible = "brcm,bcm2835-unicam";
> +			reg = <0x7e801000 0x800>,
> +			      <0x7e802004 0x4>;
> +			interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
> +			status = "disabled";
> +		};
> +
>  		pixelvalve3: pixelvalve@7ec12000 {
>  			compatible = "brcm,bcm2711-pixelvalve3";
>  			reg = <0x7ec12000 0x100>;