From patchwork Mon Sep 11 12:59:30 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yunfei Dong X-Patchwork-Id: 721618 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E5B93EEB581 for ; Mon, 11 Sep 2023 20:48:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234166AbjIKUsK (ORCPT ); Mon, 11 Sep 2023 16:48:10 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57802 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237577AbjIKM74 (ORCPT ); Mon, 11 Sep 2023 08:59:56 -0400 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 668B9E54; Mon, 11 Sep 2023 05:59:51 -0700 (PDT) X-UUID: 164d770a50a311ee8051498923ad61e6-20230911 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=MV52mRhP9tKIr/opsTty1/sxOMChKl7+JpvPlP7R97k=; b=YTSW51AaleakukjmqME9HT1ESWr/1wPuj0jaTwAGGBl/0kFC2TOi98mb5mpfMd9/emUh2uACLP/+eP3vOoVVhvtp1PnvRnUyZNZDzlZMCpumWFhWQ/EEL0CDOwoJnx1l8Ss6AOjOaONbzG/yH7r+UtokXfOsMXx9TPryErnN6OQ=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.31, REQID:0891ea57-d00c-4aaf-a37f-da6c27eeed5a, IP:0, U RL:0,TC:0,Content:-25,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTIO N:release,TS:-25 X-CID-META: VersionHash:0ad78a4, CLOUDID:cb17b4be-14cc-44ca-b657-2d2783296e72, B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:11|1,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV:0,LES:1,SPR: NO,DKR:0,DKP:0,BRR:0,BRE:0 X-CID-BVR: 0,NGT X-CID-BAS: 0,NGT,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR,TF_CID_SPAM_ULN X-UUID: 164d770a50a311ee8051498923ad61e6-20230911 Received: from mtkmbs10n1.mediatek.inc [(172.21.101.34)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 2037422656; Mon, 11 Sep 2023 20:59:47 +0800 Received: from mtkmbs13n2.mediatek.inc (172.21.101.194) by MTKMBS14N1.mediatek.inc (172.21.101.75) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Mon, 11 Sep 2023 20:59:46 +0800 Received: from mhfsdcap04.gcn.mediatek.inc (10.17.3.154) by mtkmbs13n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Mon, 11 Sep 2023 20:59:45 +0800 From: Yunfei Dong To: =?utf-8?q?N=C3=ADcolas_F_=2E_R_=2E_A_=2E_Prado?= , Nicolas Dufresne , Hans Verkuil , AngeloGioacchino Del Regno , Benjamin Gaignard , Nathan Hebert CC: Chen-Yu Tsai , Hsin-Yi Wang , Fritz Koenig , Daniel Vetter , "Steve Cho" , Yunfei Dong , , , , , , Subject: [PATCH 08/14] media: medkatek: vcodec: support one plane capture buffer Date: Mon, 11 Sep 2023 20:59:30 +0800 Message-ID: <20230911125936.10648-9-yunfei.dong@mediatek.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230911125936.10648-1-yunfei.dong@mediatek.com> References: <20230911125936.10648-1-yunfei.dong@mediatek.com> MIME-Version: 1.0 X-TM-AS-Product-Ver: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-AS-Result: No-10--7.282000-8.000000 X-TMASE-MatchedRID: OAA+NK1lXvCON+GapO42vQI0yP/uoH+Dh+w9Wz/xXDr7efdnqtsaE5kC erFMaabilTJXKqh1ne29cOdjc/43lZvrNI7WoC7k4bl1FkKDELeSiza26cvwNAZbeEWcL03VBOY womTUbTuv4DICkMuT3WF6wLzbAtAr7U4NkBX42MYQ9/tMNQ4aiuWNJG9IamrcGM7yl/HgfuBLbT Uf+O4SvG0xs/kJ5jkfbhGQTDKMjW9sQJ9Z3jpPTZ4CIKY/Hg3AGdQnQSTrKGPEQdG7H66TyB5vY IBVaAnAp/fB6ESOyO0AGNbWPiaoa9g6B/5eFUQxFoVntomuLecHni4mvqvEW37cGd19dSFd X-TM-AS-User-Approved-Sender: No X-TM-AS-User-Blocked-Sender: No X-TMASE-Result: 10--7.282000-8.000000 X-TMASE-Version: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-SNTS-SMTP: 8BF0A8CF82D51550261464CAC4FB4A96F7E0FE271D54C97882A04BEE1EECDAC82000:8 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org The capture buffer has two planes for format MM21, but user space only allocate secure memory for plane[0], and the size is Y data + uv data. The driver need to support one plane decoder for svp mode. Signed-off-by: Yunfei Dong --- .../mediatek/vcodec/decoder/mtk_vcodec_dec.c | 24 ++++++++++++------- .../vcodec/decoder/mtk_vcodec_dec_stateless.c | 13 ++++++---- .../decoder/vdec/vdec_h264_req_common.c | 16 +++++++------ .../mediatek/vcodec/decoder/vdec_drv_if.c | 4 ++-- 4 files changed, 34 insertions(+), 23 deletions(-) diff --git a/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec.c b/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec.c index 91ed576d6821..457c3e2979c9 100644 --- a/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec.c +++ b/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec.c @@ -541,14 +541,15 @@ static int vidioc_vdec_s_fmt(struct file *file, void *priv, ctx->q_data[MTK_Q_DATA_DST].bytesperline[0] = ctx->picinfo.buf_w; } else { - ctx->q_data[MTK_Q_DATA_DST].sizeimage[0] = - ctx->picinfo.fb_sz[0]; - ctx->q_data[MTK_Q_DATA_DST].bytesperline[0] = - ctx->picinfo.buf_w; - ctx->q_data[MTK_Q_DATA_DST].sizeimage[1] = - ctx->picinfo.fb_sz[1]; - ctx->q_data[MTK_Q_DATA_DST].bytesperline[1] = - ctx->picinfo.buf_w; + if (ctx->is_svp_mode) + ctx->q_data[MTK_Q_DATA_DST].sizeimage[0] = + ctx->picinfo.fb_sz[0] + ctx->picinfo.fb_sz[1]; + else + ctx->q_data[MTK_Q_DATA_DST].sizeimage[0] = ctx->picinfo.fb_sz[0]; + + ctx->q_data[MTK_Q_DATA_DST].bytesperline[0] = ctx->picinfo.buf_w; + ctx->q_data[MTK_Q_DATA_DST].sizeimage[1] = ctx->picinfo.fb_sz[1]; + ctx->q_data[MTK_Q_DATA_DST].bytesperline[1] = ctx->picinfo.buf_w; } ctx->q_data[MTK_Q_DATA_DST].coded_width = ctx->picinfo.buf_w; @@ -673,7 +674,12 @@ static int vidioc_vdec_g_fmt(struct file *file, void *priv, * So we just return picinfo yet, and update picinfo in * stop_streaming hook function */ - q_data->sizeimage[0] = ctx->picinfo.fb_sz[0]; + + if (ctx->is_svp_mode) + q_data->sizeimage[0] = ctx->picinfo.fb_sz[0] + ctx->picinfo.fb_sz[1]; + else + q_data->sizeimage[0] = ctx->picinfo.fb_sz[0]; + q_data->sizeimage[1] = ctx->picinfo.fb_sz[1]; q_data->bytesperline[0] = ctx->last_decoded_picinfo.buf_w; q_data->bytesperline[1] = ctx->last_decoded_picinfo.buf_w; diff --git a/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_stateless.c b/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_stateless.c index e29c9c58f3da..2ea517883a86 100644 --- a/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_stateless.c +++ b/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_stateless.c @@ -256,11 +256,12 @@ static struct vdec_fb *vdec_get_cap_buffer(struct mtk_vcodec_dec_ctx *ctx) framebuf = container_of(vb2_v4l2, struct mtk_video_dec_buf, m2m_buf.vb); pfb = &framebuf->frame_buffer; - pfb->base_y.va = vb2_plane_vaddr(dst_buf, 0); + if (!ctx->is_svp_mode) + pfb->base_y.va = vb2_plane_vaddr(dst_buf, 0); pfb->base_y.dma_addr = vb2_dma_contig_plane_dma_addr(dst_buf, 0); pfb->base_y.size = ctx->q_data[MTK_Q_DATA_DST].sizeimage[0]; - if (ctx->q_data[MTK_Q_DATA_DST].fmt->num_planes == 2) { + if (ctx->q_data[MTK_Q_DATA_DST].fmt->num_planes == 2 && !ctx->is_svp_mode) { pfb->base_c.va = vb2_plane_vaddr(dst_buf, 1); pfb->base_c.dma_addr = vb2_dma_contig_plane_dma_addr(dst_buf, 1); @@ -310,16 +311,18 @@ static void mtk_vdec_worker(struct work_struct *work) mtk_v4l2_vdec_dbg(3, ctx, "[%d] (%d) id=%d, vb=%p", ctx->id, vb2_src->vb2_queue->type, vb2_src->index, vb2_src); - bs_src->va = vb2_plane_vaddr(vb2_src, 0); - bs_src->dma_addr = vb2_dma_contig_plane_dma_addr(vb2_src, 0); - bs_src->size = (size_t)vb2_src->planes[0].bytesused; + if (!ctx->is_svp_mode) { + bs_src->va = vb2_plane_vaddr(vb2_src, 0); if (!bs_src->va) { v4l2_m2m_job_finish(dev->m2m_dev_dec, ctx->m2m_ctx); mtk_v4l2_vdec_err(ctx, "[%d] id=%d source buffer is NULL", ctx->id, vb2_src->index); return; + } } + bs_src->dma_addr = vb2_dma_contig_plane_dma_addr(vb2_src, 0); + bs_src->size = (size_t)vb2_src->planes[0].bytesused; mtk_v4l2_vdec_dbg(3, ctx, "[%d] Bitstream VA=%p DMA=%pad Size=%zx vb=%p", ctx->id, bs_src->va, &bs_src->dma_addr, bs_src->size, vb2_src); /* Apply request controls. */ diff --git a/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_h264_req_common.c b/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_h264_req_common.c index 5ca20d75dc8e..838f0eeea6e2 100644 --- a/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_h264_req_common.c +++ b/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_h264_req_common.c @@ -81,13 +81,15 @@ void mtk_vdec_h264_fill_dpb_info(struct mtk_vcodec_dec_ctx *ctx, h264_dpb_info[index].y_dma_addr = vb2_dma_contig_plane_dma_addr(vb, 0); - if (ctx->q_data[MTK_Q_DATA_DST].fmt->num_planes == 2) - h264_dpb_info[index].c_dma_addr = - vb2_dma_contig_plane_dma_addr(vb, 1); - else - h264_dpb_info[index].c_dma_addr = - h264_dpb_info[index].y_dma_addr + - ctx->picinfo.fb_sz[0]; + if (!ctx->is_svp_mode) { + if (ctx->q_data[MTK_Q_DATA_DST].fmt->num_planes == 2) + h264_dpb_info[index].c_dma_addr = + vb2_dma_contig_plane_dma_addr(vb, 1); + else + h264_dpb_info[index].c_dma_addr = + h264_dpb_info[index].y_dma_addr + + ctx->picinfo.fb_sz[0]; + } } } diff --git a/drivers/media/platform/mediatek/vcodec/decoder/vdec_drv_if.c b/drivers/media/platform/mediatek/vcodec/decoder/vdec_drv_if.c index d0b459b1603f..c7d33e540a13 100644 --- a/drivers/media/platform/mediatek/vcodec/decoder/vdec_drv_if.c +++ b/drivers/media/platform/mediatek/vcodec/decoder/vdec_drv_if.c @@ -73,14 +73,14 @@ int vdec_if_decode(struct mtk_vcodec_dec_ctx *ctx, struct mtk_vcodec_mem *bs, { int ret = 0; - if (bs) { + if (bs && !ctx->is_svp_mode) { if ((bs->dma_addr & 63) != 0) { mtk_v4l2_vdec_err(ctx, "bs dma_addr should 64 byte align"); return -EINVAL; } } - if (fb) { + if (fb && !ctx->is_svp_mode) { if (((fb->base_y.dma_addr & 511) != 0) || ((fb->base_c.dma_addr & 511) != 0)) { mtk_v4l2_vdec_err(ctx, "frame buffer dma_addr should 512 byte align");