From patchwork Wed May 14 15:41:04 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Riesch via B4 Relay X-Patchwork-Id: 890071 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F0BF41DF254; Wed, 14 May 2025 15:53:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747237983; cv=none; b=bTZ1bJvb8+PjivOqziyp+M75cN/6yfytKh/SMwDnvAba8M6zd4k2vtJ17p0yU/0u2Hi4Ld6ZwNDmbQCkeDTg0L9jHCD/h9my+06zCq1Go+4x3vXh6utxvJbxlSBYj6UvbRXemjoK5M1u5Q+1kK2ngUYu+rFh+L7dyYRNCMeSQ/w= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747237983; c=relaxed/simple; bh=DtIQlJAmE4+DMDfr5uQRmYHCQxD/D4QVVzTZ2CMwypg=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Thf++mjucRC6QAuMBIh6fZBGfcavAmCVQdfigYPMk/9cMa3jZ0TF+t5L7m8KBSe4F9EvHD1PoUw1+Xxzv3+4eOO4Ph/p0XEErdgNSvF5vWZmnmUM5X8qayoYlO6ForYioPwNIg7/Cx/W4pStx/zp6f4pK3DU4mCu+6vbo68QK3U= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=r0A+WOzL; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="r0A+WOzL" Received: by smtp.kernel.org (Postfix) with ESMTPS id C06BCC4CEF2; Wed, 14 May 2025 15:53:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1747237982; bh=DtIQlJAmE4+DMDfr5uQRmYHCQxD/D4QVVzTZ2CMwypg=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=r0A+WOzLNkoqKAcHS1bl8repQ6Hh+7mJLG/fiAFHADRgoi9yeamzScGtQtyAWlW3J LN+xCAKljVYxwaARHhkMMAMuNmSbQmf3baQsuQRJj2Mr0m4g5Q/XjxBKA1wecBwqYw uhgLNic2QEcDZdH9sFvRnc4g8RXsRqMULYar1CCaXYvhBO/DOIA71sHL5dOObtUJ3E 8j9x/1LZfIQ84DZ8kLHOmpLNudRYIliRBEaqAgMirG8aH6AcxW9cKm+sDixvVk05+F UmouXQ8cbOh4UZXEi2WaFsPGWV49oVjXb2Xms+wjx3UdFCe+131viC+j3Y1nK7A0p4 lH1EtArK2ibZQ== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id B699AC54754; Wed, 14 May 2025 15:53:02 +0000 (UTC) From: Michael Riesch via B4 Relay Date: Wed, 14 May 2025 17:41:04 +0200 Subject: [PATCH v7 03/14] media: dt-bindings: add rockchip px30 vip Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240220-rk3568-vicap-v7-3-7581fd96a33a@collabora.com> References: <20240220-rk3568-vicap-v7-0-7581fd96a33a@collabora.com> In-Reply-To: <20240220-rk3568-vicap-v7-0-7581fd96a33a@collabora.com> To: Mehdi Djait , Maxime Chevallier , =?utf-8?q?Th=C3=A9o_Leb?= =?utf-8?q?run?= , Thomas Petazzoni , Gerald Loacker , Bryan O'Donoghue , Markus Elfring , Laurent Pinchart , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Kever Yang , Nicolas Dufresne , Sebastian Reichel , Collabora Kernel Team , Paul Kocialkowski , Alexander Shiyan , Val Packett , Rob Herring , Philipp Zabel , Sakari Ailus Cc: linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, Michael Riesch , Michael Riesch , Mehdi Djait X-Mailer: b4 0.12.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1747237265; l=4307; i=michael.riesch@collabora.com; s=20250410; h=from:subject:message-id; bh=F4reHUYJmgG6HWFPyn6O1n3cL5RvLs6miCivCTB9A1Y=; b=Mbhd6IlS5+KOsSdVSlo5iE+JpWN62HR/8KV/amn/Bwtbq6W9rip8GskUYqJ0iQBmKXbLnWyni w4imxqHuz+YCjkYSVY/dj09ntgctnB9uF8MzWlcrmgKjCJTYb0RY4Yu X-Developer-Key: i=michael.riesch@collabora.com; a=ed25519; pk=+MWX1fffLFZtTPG/I6XdYm/+OSvpRE8D9evQaWbiN04= X-Endpoint-Received: by B4 Relay for michael.riesch@collabora.com/20250410 with auth_id=371 X-Original-From: Michael Riesch Reply-To: michael.riesch@collabora.com From: Mehdi Djait Add documentation for the Rockchip PX30 Video Input Processor (VIP). Signed-off-by: Mehdi Djait [revised description] Reviewed-by: Rob Herring (Arm) Signed-off-by: Michael Riesch Signed-off-by: Michael Riesch --- .../bindings/media/rockchip,px30-vip.yaml | 122 +++++++++++++++++++++ MAINTAINERS | 1 + 2 files changed, 123 insertions(+) diff --git a/Documentation/devicetree/bindings/media/rockchip,px30-vip.yaml b/Documentation/devicetree/bindings/media/rockchip,px30-vip.yaml new file mode 100644 index 000000000000..9f7ab6965636 --- /dev/null +++ b/Documentation/devicetree/bindings/media/rockchip,px30-vip.yaml @@ -0,0 +1,122 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/rockchip,px30-vip.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Rockchip PX30 Video Input Processor (VIP) + +maintainers: + - Mehdi Djait + - Michael Riesch + +description: + The Rockchip PX30 Video Input Processor (VIP) receives the data from a camera + sensor or CCIR656 encoder and transfers it into system main memory by AXI bus. + +properties: + compatible: + const: rockchip,px30-vip + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + items: + - description: ACLK + - description: HCLK + - description: PCLK + + clock-names: + items: + - const: aclk + - const: hclk + - const: pclk + + resets: + items: + - description: AXI + - description: AHB + - description: PCLK IN + + reset-names: + items: + - const: axi + - const: ahb + - const: pclkin + + power-domains: + maxItems: 1 + + ports: + $ref: /schemas/graph.yaml#/properties/ports + + properties: + port@0: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: input port on the parallel interface + + properties: + endpoint: + $ref: video-interfaces.yaml# + unevaluatedProperties: false + + properties: + bus-type: + enum: [5, 6] + + required: + - bus-type + + required: + - port@0 + +required: + - compatible + - reg + - interrupts + - clocks + - ports + +additionalProperties: false + +examples: + - | + #include + #include + #include + #include + + soc { + #address-cells = <2>; + #size-cells = <2>; + + video-capture@ff490000 { + compatible = "rockchip,px30-vip"; + reg = <0x0 0xff490000 0x0 0x200>; + interrupts = ; + clocks = <&cru ACLK_CIF>, <&cru HCLK_CIF>, <&cru PCLK_CIF>; + clock-names = "aclk", "hclk", "pclk"; + power-domains = <&power PX30_PD_VI>; + resets = <&cru SRST_CIF_A>, <&cru SRST_CIF_H>, <&cru SRST_CIF_PCLKIN>; + reset-names = "axi", "ahb", "pclkin"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + cif_in: endpoint { + remote-endpoint = <&tw9900_out>; + bus-type = ; + }; + }; + }; + }; + }; diff --git a/MAINTAINERS b/MAINTAINERS index dcfef77c3037..c71ba2de8e71 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -21008,6 +21008,7 @@ M: Michael Riesch L: linux-media@vger.kernel.org S: Maintained F: Documentation/admin-guide/media/rkcif* +F: Documentation/devicetree/bindings/media/rockchip,px30-vip.yaml ROCKCHIP CRYPTO DRIVERS M: Corentin Labbe