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[93.5.22.158]) by smtp.googlemail.com with ESMTPSA id 4fb4d7f45d1cf-5a69c1f56a0sm1982126a12.64.2024.07.21.23.53.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 21 Jul 2024 23:53:48 -0700 (PDT) From: Alexandre Mergnat Date: Mon, 22 Jul 2024 08:53:36 +0200 Subject: [PATCH v7 07/16] ASoC: mediatek: mt8365: Add ADDA DAI support Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240226-audio-i350-v7-7-6518d953a141@baylibre.com> References: <20240226-audio-i350-v7-0-6518d953a141@baylibre.com> In-Reply-To: <20240226-audio-i350-v7-0-6518d953a141@baylibre.com> To: Liam Girdwood , Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Lee Jones , Flora Fu , Jaroslav Kysela , Takashi Iwai , Sumit Semwal , =?utf-8?q?Christian_K=C3=B6nig?= , Catalin Marinas , Will Deacon , Rob Herring , Krzysztof Kozlowski Cc: linux-sound@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-media@vger.kernel.org, dri-devel@lists.freedesktop.org, linaro-mm-sig@lists.linaro.org, Alexandre Mergnat X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=10178; i=amergnat@baylibre.com; h=from:subject:message-id; bh=RXhIpvujER3PQbXInLE+mNrQ0q89zgaltaqXUv3qkf8=; b=owEBbQKS/ZANAwAKAStGSZ1+MdRFAcsmYgBmngHxdWphi9yIzrpSPy5RBavT9AyUyeb3zpTHVtzc G5jpYM+JAjMEAAEKAB0WIQQjG17X8+qqcA5g/osrRkmdfjHURQUCZp4B8QAKCRArRkmdfjHURZPZEA C4BjdlgJiJiIMNIilN8t2TkvIR5u8q/fOyEI22Rpqymk8vPZm4T+Z8KCMS4PEVx4IAtRrPQlFecPb/ GyyeM+ONYkTdpeR5Lmv+VVz+g7OLG+vXvw9KvQID2cyu0UplvCWZRgKFgANtD/pmXGMXRjFNmt9iEw LA6Bu1bH71vmD0l365PXRbzqjYDbUtsKMoATr3T74/AC0qMHOusPJZ0BXBTF4Ts8HdlOBdbUHtOl3I NmVSvhs4vtS4a+Mk3Crz9fRYFs+crPxuF2ggnxvA6Lht/5A89FMkkjJ5D0EXyU/zsvpfA0l4YA1YRr nMUKIPu3vdk2er7Tse59CSHlcrvzpJkyZRDzskoN9EiV/V/ojLjoOKwUWlwawDO5yWqPyEnQeLErR7 l52d6zKN/8rV1lf2Gqx7Xv9GvgFbo3PUy1w6nW52suAO40nlqtT9xi1kXbEtbUGE3olKTiavqb7x0Q zKjx+bOTSaA8pwrUakJVCWlT3Vt6si6lcM38ADCuwMfbrfDXVWyiH/agul2zB8C/JoGwbo57pUkEwo jWJj3ME4iaQwGlkDAt367c1DTO4iv/8MqZzauO59zagLv0rZMX7uZBJ9uhidx7TQxNJdMDHENPq3JB cVsT+L/GZvwf+B+0s/5XEOY+dIA+MxeZzJQx0ruDnHlwwUgGbJr8PBZyPrNw== X-Developer-Key: i=amergnat@baylibre.com; a=openpgp; fpr=231B5ED7F3EAAA700E60FE8B2B46499D7E31D445 Add ADDA Device Audio Interface support for MT8365 SoC. Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Alexandre Mergnat --- sound/soc/mediatek/mt8365/mt8365-dai-adda.c | 311 ++++++++++++++++++++++++++++ 1 file changed, 311 insertions(+) diff --git a/sound/soc/mediatek/mt8365/mt8365-dai-adda.c b/sound/soc/mediatek/mt8365/mt8365-dai-adda.c new file mode 100644 index 000000000000..a04c24bbfcff --- /dev/null +++ b/sound/soc/mediatek/mt8365/mt8365-dai-adda.c @@ -0,0 +1,311 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * MediaTek 8365 ALSA SoC Audio DAI ADDA Control + * + * Copyright (c) 2024 MediaTek Inc. + * Authors: Jia Zeng + * Alexandre Mergnat + */ + +#include +#include +#include +#include "mt8365-afe-clk.h" +#include "mt8365-afe-common.h" +#include "../common/mtk-dai-adda-common.h" + +static int adda_afe_on_ref_cnt; + +/* DAI Drivers */ + +static int mt8365_dai_set_adda_out(struct mtk_base_afe *afe, unsigned int rate) +{ + unsigned int val; + + if (rate == 8000 || rate == 16000) + val = AFE_ADDA_DL_VOICE_DATA; + else + val = 0; + + val |= FIELD_PREP(AFE_ADDA_DL_SAMPLING_RATE, + mtk_adda_dl_rate_transform(afe, rate)); + val |= AFE_ADDA_DL_8X_UPSAMPLE | + AFE_ADDA_DL_MUTE_OFF_CH1 | + AFE_ADDA_DL_MUTE_OFF_CH2 | + AFE_ADDA_DL_DEGRADE_GAIN; + + regmap_update_bits(afe->regmap, AFE_ADDA_PREDIS_CON0, 0xffffffff, 0); + regmap_update_bits(afe->regmap, AFE_ADDA_PREDIS_CON1, 0xffffffff, 0); + regmap_update_bits(afe->regmap, AFE_ADDA_DL_SRC2_CON0, 0xffffffff, val); + /* SA suggest apply -0.3db to audio/speech path */ + regmap_update_bits(afe->regmap, AFE_ADDA_DL_SRC2_CON1, + 0xffffffff, 0xf74f0000); + /* SA suggest use default value for sdm */ + regmap_update_bits(afe->regmap, AFE_ADDA_DL_SDM_DCCOMP_CON, + 0xffffffff, 0x0700701e); + + return 0; +} + +static int mt8365_dai_set_adda_in(struct mtk_base_afe *afe, unsigned int rate) +{ + unsigned int val; + + val = FIELD_PREP(AFE_ADDA_UL_SAMPLING_RATE, + mtk_adda_ul_rate_transform(afe, rate)); + regmap_update_bits(afe->regmap, AFE_ADDA_UL_SRC_CON0, + AFE_ADDA_UL_SAMPLING_RATE, val); + /* Using Internal ADC */ + regmap_update_bits(afe->regmap, AFE_ADDA_TOP_CON0, 0x1, 0x0); + + return 0; +} + +int mt8365_dai_enable_adda_on(struct mtk_base_afe *afe) +{ + unsigned long flags; + struct mt8365_afe_private *afe_priv = afe->platform_priv; + + spin_lock_irqsave(&afe_priv->afe_ctrl_lock, flags); + + adda_afe_on_ref_cnt++; + if (adda_afe_on_ref_cnt == 1) + regmap_update_bits(afe->regmap, AFE_ADDA_UL_DL_CON0, + AFE_ADDA_UL_DL_ADDA_AFE_ON, + AFE_ADDA_UL_DL_ADDA_AFE_ON); + + spin_unlock_irqrestore(&afe_priv->afe_ctrl_lock, flags); + + return 0; +} + +int mt8365_dai_disable_adda_on(struct mtk_base_afe *afe) +{ + unsigned long flags; + struct mt8365_afe_private *afe_priv = afe->platform_priv; + + spin_lock_irqsave(&afe_priv->afe_ctrl_lock, flags); + + adda_afe_on_ref_cnt--; + if (adda_afe_on_ref_cnt == 0) + regmap_update_bits(afe->regmap, AFE_ADDA_UL_DL_CON0, + AFE_ADDA_UL_DL_ADDA_AFE_ON, + ~AFE_ADDA_UL_DL_ADDA_AFE_ON); + else if (adda_afe_on_ref_cnt < 0) { + adda_afe_on_ref_cnt = 0; + dev_warn(afe->dev, "Abnormal adda_on ref count. Force it to 0\n"); + } + + spin_unlock_irqrestore(&afe_priv->afe_ctrl_lock, flags); + + return 0; +} + +static void mt8365_dai_set_adda_out_enable(struct mtk_base_afe *afe, + bool enable) +{ + regmap_update_bits(afe->regmap, AFE_ADDA_DL_SRC2_CON0, 0x1, enable); + + if (enable) + mt8365_dai_enable_adda_on(afe); + else + mt8365_dai_disable_adda_on(afe); +} + +static void mt8365_dai_set_adda_in_enable(struct mtk_base_afe *afe, bool enable) +{ + if (enable) { + regmap_update_bits(afe->regmap, AFE_ADDA_UL_SRC_CON0, 0x1, 0x1); + mt8365_dai_enable_adda_on(afe); + /* enable aud_pad_top fifo */ + regmap_update_bits(afe->regmap, AFE_AUD_PAD_TOP, + 0xffffffff, 0x31); + } else { + /* disable aud_pad_top fifo */ + regmap_update_bits(afe->regmap, AFE_AUD_PAD_TOP, + 0xffffffff, 0x30); + regmap_update_bits(afe->regmap, AFE_ADDA_UL_SRC_CON0, 0x1, 0x0); + /* de suggest disable ADDA_UL_SRC at least wait 125us */ + usleep_range(150, 300); + mt8365_dai_disable_adda_on(afe); + } +} + +static int mt8365_dai_int_adda_startup(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai); + unsigned int stream = substream->stream; + + mt8365_afe_enable_main_clk(afe); + + if (stream == SNDRV_PCM_STREAM_PLAYBACK) { + mt8365_afe_enable_top_cg(afe, MT8365_TOP_CG_DAC); + mt8365_afe_enable_top_cg(afe, MT8365_TOP_CG_DAC_PREDIS); + } else if (stream == SNDRV_PCM_STREAM_CAPTURE) { + mt8365_afe_enable_top_cg(afe, MT8365_TOP_CG_ADC); + } + + return 0; +} + +static void mt8365_dai_int_adda_shutdown(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai); + struct mt8365_afe_private *afe_priv = afe->platform_priv; + struct mt8365_be_dai_data *be = + &afe_priv->be_data[dai->id - MT8365_AFE_BACKEND_BASE]; + unsigned int stream = substream->stream; + + if (be->prepared[stream]) { + if (stream == SNDRV_PCM_STREAM_PLAYBACK) { + mt8365_dai_set_adda_out_enable(afe, false); + mt8365_afe_set_i2s_out_enable(afe, false); + } else { + mt8365_dai_set_adda_in_enable(afe, false); + } + be->prepared[stream] = false; + } + + if (stream == SNDRV_PCM_STREAM_PLAYBACK) { + mt8365_afe_disable_top_cg(afe, MT8365_TOP_CG_DAC_PREDIS); + mt8365_afe_disable_top_cg(afe, MT8365_TOP_CG_DAC); + } else if (stream == SNDRV_PCM_STREAM_CAPTURE) { + mt8365_afe_disable_top_cg(afe, MT8365_TOP_CG_ADC); + } + + mt8365_afe_disable_main_clk(afe); +} + +static int mt8365_dai_int_adda_prepare(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai); + struct mt8365_afe_private *afe_priv = afe->platform_priv; + struct mt8365_be_dai_data *be = + &afe_priv->be_data[dai->id - MT8365_AFE_BACKEND_BASE]; + unsigned int rate = substream->runtime->rate; + int bit_width = snd_pcm_format_width(substream->runtime->format); + int ret; + + dev_info(afe->dev, "%s '%s' rate = %u\n", __func__, + snd_pcm_stream_str(substream), rate); + + if (be->prepared[substream->stream]) { + dev_info(afe->dev, "%s '%s' prepared already\n", + __func__, snd_pcm_stream_str(substream)); + return 0; + } + + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { + ret = mt8365_dai_set_adda_out(afe, rate); + if (ret) + return ret; + + ret = mt8365_afe_set_i2s_out(afe, rate, bit_width); + if (ret) + return ret; + + mt8365_dai_set_adda_out_enable(afe, true); + mt8365_afe_set_i2s_out_enable(afe, true); + } else { + ret = mt8365_dai_set_adda_in(afe, rate); + if (ret) + return ret; + + mt8365_dai_set_adda_in_enable(afe, true); + } + be->prepared[substream->stream] = true; + return 0; +} + +static const struct snd_soc_dai_ops mt8365_afe_int_adda_ops = { + .startup = mt8365_dai_int_adda_startup, + .shutdown = mt8365_dai_int_adda_shutdown, + .prepare = mt8365_dai_int_adda_prepare, +}; + +static struct snd_soc_dai_driver mtk_dai_adda_driver[] = { + { + .name = "INT ADDA", + .id = MT8365_AFE_IO_INT_ADDA, + .playback = { + .stream_name = "INT ADDA Playback", + .channels_min = 1, + .channels_max = 2, + .rates = SNDRV_PCM_RATE_8000_48000, + .formats = SNDRV_PCM_FMTBIT_S16_LE, + }, + .capture = { + .stream_name = "INT ADDA Capture", + .channels_min = 1, + .channels_max = 2, + .rates = SNDRV_PCM_RATE_16000 | + SNDRV_PCM_RATE_32000 | + SNDRV_PCM_RATE_48000, + .formats = SNDRV_PCM_FMTBIT_S16_LE | + SNDRV_PCM_FMTBIT_S32_LE, + }, + .ops = &mt8365_afe_int_adda_ops, + } +}; + +/* DAI Controls */ + +static const struct snd_kcontrol_new mtk_adda_dl_ch1_mix[] = { + SOC_DAPM_SINGLE_AUTODISABLE("GAIN1_OUT_CH1 Switch", AFE_CONN3, + 10, 1, 0), +}; + +static const struct snd_kcontrol_new mtk_adda_dl_ch2_mix[] = { + SOC_DAPM_SINGLE_AUTODISABLE("GAIN1_OUT_CH2 Switch", AFE_CONN4, + 11, 1, 0), +}; + +static const struct snd_kcontrol_new int_adda_o03_o04_enable_ctl = + SOC_DAPM_SINGLE_VIRT("Switch", 1); + +/* DAI widget */ + +static const struct snd_soc_dapm_widget mtk_dai_adda_widgets[] = { + SND_SOC_DAPM_SWITCH("INT ADDA O03_O04", SND_SOC_NOPM, 0, 0, + &int_adda_o03_o04_enable_ctl), + /* inter-connections */ + SND_SOC_DAPM_MIXER("ADDA_DL_CH1", SND_SOC_NOPM, 0, 0, + mtk_adda_dl_ch1_mix, + ARRAY_SIZE(mtk_adda_dl_ch1_mix)), + SND_SOC_DAPM_MIXER("ADDA_DL_CH2", SND_SOC_NOPM, 0, 0, + mtk_adda_dl_ch2_mix, + ARRAY_SIZE(mtk_adda_dl_ch2_mix)), +}; + +/* DAI route */ + +static const struct snd_soc_dapm_route mtk_dai_adda_routes[] = { + {"INT ADDA O03_O04", "Switch", "O03"}, + {"INT ADDA O03_O04", "Switch", "O04"}, + {"INT ADDA Playback", NULL, "INT ADDA O03_O04"}, + {"INT ADDA Playback", NULL, "ADDA_DL_CH1"}, + {"INT ADDA Playback", NULL, "ADDA_DL_CH2"}, + {"AIN Mux", "INT ADC", "INT ADDA Capture"}, + {"ADDA_DL_CH1", "GAIN1_OUT_CH1", "Hostless FM DL"}, + {"ADDA_DL_CH2", "GAIN1_OUT_CH2", "Hostless FM DL"}, +}; + +int mt8365_dai_adda_register(struct mtk_base_afe *afe) +{ + struct mtk_base_afe_dai *dai; + + dai = devm_kzalloc(afe->dev, sizeof(*dai), GFP_KERNEL); + if (!dai) + return -ENOMEM; + list_add(&dai->list, &afe->sub_dais); + dai->dai_drivers = mtk_dai_adda_driver; + dai->num_dai_drivers = ARRAY_SIZE(mtk_dai_adda_driver); + dai->dapm_widgets = mtk_dai_adda_widgets; + dai->num_dapm_widgets = ARRAY_SIZE(mtk_dai_adda_widgets); + dai->dapm_routes = mtk_dai_adda_routes; + dai->num_dapm_routes = ARRAY_SIZE(mtk_dai_adda_routes); + return 0; +}