diff --git a/drivers/media/i2c/ds90ub960.c b/drivers/media/i2c/ds90ub960.c
index cc944d737524..dc9ead85c676 100644
--- a/drivers/media/i2c/ds90ub960.c
+++ b/drivers/media/i2c/ds90ub960.c
@@ -2257,268 +2257,7 @@ static int ub960_init_rx_port_ub960(struct ub960_data *priv,
 	return ret;
 }
 
-static int ub960_init_rx_port_ub9702_fpd3(struct ub960_data *priv,
-					  struct ub960_rxport *rxport)
-{
-	unsigned int nport = rxport->nport;
-	u8 bc_freq_val;
-	u8 fpd_func_mode;
-	int ret = 0;
-
-	switch (rxport->rx_mode) {
-	case RXPORT_MODE_RAW10:
-		bc_freq_val = 0;
-		fpd_func_mode = 5;
-		break;
-
-	case RXPORT_MODE_RAW12_HF:
-		bc_freq_val = 0;
-		fpd_func_mode = 4;
-		break;
-
-	case RXPORT_MODE_RAW12_LF:
-		bc_freq_val = 0;
-		fpd_func_mode = 6;
-		break;
-
-	case RXPORT_MODE_CSI2_SYNC:
-		bc_freq_val = 6;
-		fpd_func_mode = 2;
-		break;
-
-	case RXPORT_MODE_CSI2_NONSYNC:
-		bc_freq_val = 2;
-		fpd_func_mode = 2;
-		break;
-
-	default:
-		return -EINVAL;
-	}
-
-	ub960_rxport_update_bits(priv, nport, UB960_RR_BCC_CONFIG, 0x7,
-				 bc_freq_val, &ret);
-	ub960_rxport_write(priv, nport, UB9702_RR_CHANNEL_MODE, fpd_func_mode,
-			   &ret);
-
-	/* set serdes_eq_mode = 1 */
-	ub960_write_ind(priv, UB960_IND_TARGET_RX_ANA(nport), 0xa8, 0x80,
-			&ret);
-
-	/* enable serdes driver */
-	ub960_write_ind(priv, UB960_IND_TARGET_RX_ANA(nport), 0x0d, 0x7f,
-			&ret);
-
-	/* set serdes_eq_offset=4 */
-	ub960_write_ind(priv, UB960_IND_TARGET_RX_ANA(nport), 0x2b, 0x04,
-			&ret);
-
-	/* init default serdes_eq_max in 0xa9 */
-	ub960_write_ind(priv, UB960_IND_TARGET_RX_ANA(nport), 0xa9, 0x23,
-			&ret);
-
-	/* init serdes_eq_min in 0xaa */
-	ub960_write_ind(priv, UB960_IND_TARGET_RX_ANA(nport), 0xaa, 0, &ret);
-
-	/* serdes_driver_ctl2 control: DS90UB953-Q1/DS90UB933-Q1/DS90UB913A-Q1 */
-	ub960_ind_update_bits(priv, UB960_IND_TARGET_RX_ANA(nport), 0x1b,
-			      BIT(3), BIT(3), &ret);
-
-	/* RX port to half-rate */
-	ub960_update_bits(priv, UB9702_SR_FPD_RATE_CFG, 0x3 << (nport * 2),
-			  BIT(nport * 2), &ret);
-
-	return ret;
-}
-
-static int ub960_init_rx_port_ub9702_fpd4_aeq(struct ub960_data *priv,
-					      struct ub960_rxport *rxport)
-{
-	unsigned int nport = rxport->nport;
-	bool first_time_power_up = true;
-	int ret = 0;
-
-	if (first_time_power_up) {
-		u8 v;
-
-		/* AEQ init */
-		ub960_read_ind(priv, UB960_IND_TARGET_RX_ANA(nport), 0x2c, &v,
-			       &ret);
-
-		ub960_write_ind(priv, UB960_IND_TARGET_RX_ANA(nport), 0x27, v,
-				&ret);
-		ub960_write_ind(priv, UB960_IND_TARGET_RX_ANA(nport), 0x28,
-				v + 1, &ret);
-
-		ub960_write_ind(priv, UB960_IND_TARGET_RX_ANA(nport), 0x2b,
-				0x00, &ret);
-	}
-
-	/* enable serdes_eq_ctl2 */
-	ub960_write_ind(priv, UB960_IND_TARGET_RX_ANA(nport), 0x9e, 0x00,
-			&ret);
-
-	/* enable serdes_eq_ctl1 */
-	ub960_write_ind(priv, UB960_IND_TARGET_RX_ANA(nport), 0x90, 0x40,
-			&ret);
-
-	/* enable serdes_eq_en */
-	ub960_write_ind(priv, UB960_IND_TARGET_RX_ANA(nport), 0x2e, 0x40,
-			&ret);
-
-	/* disable serdes_eq_override */
-	ub960_write_ind(priv, UB960_IND_TARGET_RX_ANA(nport), 0xf0, 0x00,
-			&ret);
-
-	/* disable serdes_gain_override */
-	ub960_write_ind(priv, UB960_IND_TARGET_RX_ANA(nport), 0x71, 0x00,
-			&ret);
-
-	return ret;
-}
-
-static int ub960_init_rx_port_ub9702_fpd4(struct ub960_data *priv,
-					  struct ub960_rxport *rxport)
-{
-	unsigned int nport = rxport->nport;
-	u8 bc_freq_val;
-	int ret = 0;
-
-	switch (rxport->rx_mode) {
-	case RXPORT_MODE_RAW10:
-		bc_freq_val = 0;
-		break;
-
-	case RXPORT_MODE_RAW12_HF:
-		bc_freq_val = 0;
-		break;
-
-	case RXPORT_MODE_RAW12_LF:
-		bc_freq_val = 0;
-		break;
-
-	case RXPORT_MODE_CSI2_SYNC:
-		bc_freq_val = 6;
-		break;
-
-	case RXPORT_MODE_CSI2_NONSYNC:
-		bc_freq_val = 2;
-		break;
-
-	default:
-		return -EINVAL;
-	}
-
-	ub960_rxport_update_bits(priv, nport, UB960_RR_BCC_CONFIG, 0x7,
-				 bc_freq_val, &ret);
-
-	/* FPD4 Sync Mode */
-	ub960_rxport_write(priv, nport, UB9702_RR_CHANNEL_MODE, 0, &ret);
-
-	/* add serdes_eq_offset of 4 */
-	ub960_write_ind(priv, UB960_IND_TARGET_RX_ANA(nport), 0x2b, 0x04,
-			&ret);
-
-	/* FPD4 serdes_start_eq in 0x27: assign default */
-	ub960_write_ind(priv, UB960_IND_TARGET_RX_ANA(nport), 0x27, 0x0, &ret);
-	/* FPD4 serdes_end_eq in 0x28: assign default */
-	ub960_write_ind(priv, UB960_IND_TARGET_RX_ANA(nport), 0x28, 0x23,
-			&ret);
-
-	/* set serdes_driver_mode into FPD IV mode */
-	ub960_write_ind(priv, UB960_IND_TARGET_RX_ANA(nport), 0x04, 0x00,
-			&ret);
-	/* set FPD PBC drv into FPD IV mode */
-	ub960_write_ind(priv, UB960_IND_TARGET_RX_ANA(nport), 0x1b, 0x00,
-			&ret);
-
-	/* set serdes_system_init to 0x2f */
-	ub960_write_ind(priv, UB960_IND_TARGET_RX_ANA(nport), 0x21, 0x2f,
-			&ret);
-	/* set serdes_system_rst in reset mode */
-	ub960_write_ind(priv, UB960_IND_TARGET_RX_ANA(nport), 0x25, 0xc1,
-			&ret);
-
-	/* RX port to 7.55G mode */
-	ub960_update_bits(priv, UB9702_SR_FPD_RATE_CFG, 0x3 << (nport * 2),
-			  0 << (nport * 2), &ret);
-
-	if (ret)
-		return ret;
-
-	ret = ub960_init_rx_port_ub9702_fpd4_aeq(priv, rxport);
-	if (ret)
-		return ret;
-
-	return 0;
-}
-
-static int ub960_init_rx_port_ub9702(struct ub960_data *priv,
-				     struct ub960_rxport *rxport)
-{
-	unsigned int nport = rxport->nport;
-	int ret;
-
-	if (rxport->cdr_mode == RXPORT_CDR_FPD3)
-		ret = ub960_init_rx_port_ub9702_fpd3(priv, rxport);
-	else /* RXPORT_CDR_FPD4 */
-		ret = ub960_init_rx_port_ub9702_fpd4(priv, rxport);
-
-	if (ret)
-		return ret;
-
-	switch (rxport->rx_mode) {
-	case RXPORT_MODE_RAW10:
-		/*
-		 * RAW10_8BIT_CTL = 0b11 : 8-bit processing using lower 8 bits
-		 * 0b10 : 8-bit processing using upper 8 bits
-		 */
-		ub960_rxport_update_bits(priv, nport, UB960_RR_PORT_CONFIG2,
-					 0x3 << 6, 0x2 << 6, &ret);
-
-		break;
-
-	case RXPORT_MODE_RAW12_HF:
-	case RXPORT_MODE_RAW12_LF:
-		/* Not implemented */
-		return -EINVAL;
-
-	case RXPORT_MODE_CSI2_SYNC:
-	case RXPORT_MODE_CSI2_NONSYNC:
-
-		break;
-	}
-
-	/* LV_POLARITY & FV_POLARITY */
-	ub960_rxport_update_bits(priv, nport, UB960_RR_PORT_CONFIG2, 0x3,
-				 rxport->lv_fv_pol, &ret);
-
-	/* Enable all interrupt sources from this port */
-	ub960_rxport_write(priv, nport, UB960_RR_PORT_ICR_HI, 0x07, &ret);
-	ub960_rxport_write(priv, nport, UB960_RR_PORT_ICR_LO, 0x7f, &ret);
-
-	/* Enable I2C_PASS_THROUGH */
-	ub960_rxport_update_bits(priv, nport, UB960_RR_BCC_CONFIG,
-				 UB960_RR_BCC_CONFIG_I2C_PASS_THROUGH,
-				 UB960_RR_BCC_CONFIG_I2C_PASS_THROUGH, &ret);
-
-	/* Enable I2C communication to the serializer via the alias addr */
-	ub960_rxport_write(priv, nport, UB960_RR_SER_ALIAS_ID,
-			   rxport->ser.alias << 1, &ret);
-
-	/* Enable RX port */
-	ub960_update_bits(priv, UB960_SR_RX_PORT_CTL, BIT(nport), BIT(nport),
-			  &ret);
-
-	if (rxport->cdr_mode == RXPORT_CDR_FPD4) {
-		/* unreset 960 AEQ */
-		ub960_write_ind(priv, UB960_IND_TARGET_RX_ANA(nport), 0x25,
-				0x41, &ret);
-	}
-
-	return ret;
-}
-
-static int ub960_init_rx_ports(struct ub960_data *priv)
+static int ub960_init_rx_ports_ub960(struct ub960_data *priv)
 {
 	struct device *dev = &priv->client->dev;
 	unsigned int port_lock_mask;
@@ -2526,13 +2265,7 @@ static int ub960_init_rx_ports(struct ub960_data *priv)
 	int ret;
 
 	for_each_active_rxport(priv) {
-		int ret;
-
-		if (priv->hw_data->is_ub9702)
-			ret = ub960_init_rx_port_ub9702(priv, it.rxport);
-		else
-			ret = ub960_init_rx_port_ub960(priv, it.rxport);
-
+		ret = ub960_init_rx_port_ub960(priv, it.rxport);
 		if (ret)
 			return ret;
 	}
@@ -4393,7 +4126,7 @@ static int ub960_probe(struct i2c_client *client)
 	if (ret)
 		goto err_free_ports;
 
-	ret = ub960_init_rx_ports(priv);
+	ret = ub960_init_rx_ports_ub960(priv);
 	if (ret)
 		goto err_disable_vpocs;
 
