From patchwork Tue Feb 18 18:44:35 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 866314 Received: from sender4-pp-f112.zoho.com (sender4-pp-f112.zoho.com [136.143.188.112]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3E9BC1EB5F2; Tue, 18 Feb 2025 18:48:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=pass smtp.client-ip=136.143.188.112 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739904499; cv=pass; b=XgqzoIZxG0CVw6oAXi6l8cMEMX0f5FCY6zLS88sfpJia88yqj5aY5Fn17L5AO/tmz1j99aAt08ujTCeIwJFNhKqn1++CppqJuyMaA/UGDDPDS5l5Kf41zL1D1y571XKBNQv12dk5allo07D0EnI84B8ZwItVq3eAre1CJsxbImE= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739904499; c=relaxed/simple; bh=s1ziSytSVmc8iAUI3o7CjEFR1GPcDl4EsLBgMcR8CUM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=WDHXA72IVlTu4gb9WOGfo3UT7npC00EmE3Ap7yT61zcEziolVCbYbrpHWepbv4tMdPk4ROBZf9c8syUfCBqzhE/Zy8USKkjOLS1K9ysL3cdTBsiIC7gOUJIxh9IA+wxfNFMBWse8kcp90BapCjY/7S6/B1KZrhfsdqVWbdPANkA= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (1024-bit key) header.d=collabora.com header.i=dmitry.osipenko@collabora.com header.b=gchaW1h0; arc=pass smtp.client-ip=136.143.188.112 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=collabora.com header.i=dmitry.osipenko@collabora.com header.b="gchaW1h0" ARC-Seal: i=1; a=rsa-sha256; t=1739904450; cv=none; d=zohomail.com; s=zohoarc; b=RZcUV63QUhHiqsUG5HmAZEP2vxilIIYbv1Hsj0x7OgGDHudE7F4Q2dk+J+uhulf3Kqbd+Wc8kw8swYWzFABF2cN1CFyABfbQmO0b1Ij+odJ7Tgri0ZeAYfBIcTBNfmRllyEeWIs3KmEjI1FHHtHq8XjYixa90SNJpSkfwmBMJFw= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1739904450; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:MIME-Version:Message-ID:References:Subject:Subject:To:To:Message-Id:Reply-To; bh=FAp90OZBq8uFu2M+L9vXUc0FUFCjHQCQSXx6G4QVIok=; b=eiGODgQaYNFQiGUJQ+91blhYpgW3qfPZ4rpibjsD9aTfUi02hvLoyqFvbOb7/CuW28tN+DvlQgprJRRVDhvKC+710ftIYsqlr1w+/6MI4xFO5mwVnSccz94hOK2VyiGfnUeQS9LIFPUiJxx/Fi0YIp0KLcxVdihIrCIOOe3z8rg= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=collabora.com; spf=pass smtp.mailfrom=dmitry.osipenko@collabora.com; dmarc=pass header.from= DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; t=1739904450; s=zohomail; d=collabora.com; i=dmitry.osipenko@collabora.com; h=From:From:To:To:Cc:Cc:Subject:Subject:Date:Date:Message-ID:In-Reply-To:References:MIME-Version:Content-Transfer-Encoding:Message-Id:Reply-To; bh=FAp90OZBq8uFu2M+L9vXUc0FUFCjHQCQSXx6G4QVIok=; b=gchaW1h0W69HygIklpuF/MasEpZgqkh4wAPbBA3D8ElQYYKbhJTLm4rjso31tcKn dqksF/RCJaamb7lQ2a3aeN89s3qhCAQ66kwVLqyKPQt7TRkdMvqpuefKSyC05bibQ02 Zc7uaGUiGqcj7jVW4a4UH+ZKDC5zZHtjvk1lPKgs= Received: by mx.zohomail.com with SMTPS id 1739904448915203.6943096613171; Tue, 18 Feb 2025 10:47:28 -0800 (PST) From: Dmitry Osipenko To: Shreeya Patel , Heiko Stuebner , Mauro Carvalho Chehab , Hans Verkuil , Rob Herring , Krzysztof Kozlowski , Conor Dooley , jose.abreu@synopsys.com, nelson.costa@synopsys.com, shawn.wen@rock-chips.com, nicolas.dufresne@collabora.com, Sebastian Reichel Cc: kernel@collabora.com, linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, Tim Surber Subject: [PATCH v7 2/6] dt-bindings: media: Document bindings for HDMI RX Controller Date: Tue, 18 Feb 2025 21:44:35 +0300 Message-ID: <20250218184439.28648-3-dmitry.osipenko@collabora.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250218184439.28648-1-dmitry.osipenko@collabora.com> References: <20250218184439.28648-1-dmitry.osipenko@collabora.com> Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ZohoMailClient: External From: Shreeya Patel Document bindings for the Synopsys DesignWare HDMI RX Controller. Reviewed-by: Sebastian Reichel Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Rob Herring Signed-off-by: Shreeya Patel Signed-off-by: Dmitry Osipenko --- .../bindings/media/snps,dw-hdmi-rx.yaml | 132 ++++++++++++++++++ 1 file changed, 132 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/snps,dw-hdmi-rx.yaml diff --git a/Documentation/devicetree/bindings/media/snps,dw-hdmi-rx.yaml b/Documentation/devicetree/bindings/media/snps,dw-hdmi-rx.yaml new file mode 100644 index 000000000000..510e94e9ca3a --- /dev/null +++ b/Documentation/devicetree/bindings/media/snps,dw-hdmi-rx.yaml @@ -0,0 +1,132 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Device Tree bindings for Synopsys DesignWare HDMI RX Controller + +--- +$id: http://devicetree.org/schemas/media/snps,dw-hdmi-rx.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Synopsys DesignWare HDMI RX Controller + +maintainers: + - Shreeya Patel + +description: + Synopsys DesignWare HDMI Input Controller preset on RK3588 SoCs + allowing devices to receive and decode high-resolution video streams + from external sources like media players, cameras, laptops, etc. + +properties: + compatible: + items: + - const: rockchip,rk3588-hdmirx-ctrler + - const: snps,dw-hdmi-rx + + reg: + maxItems: 1 + + interrupts: + maxItems: 3 + + interrupt-names: + items: + - const: cec + - const: hdmi + - const: dma + + clocks: + maxItems: 7 + + clock-names: + items: + - const: aclk + - const: audio + - const: cr_para + - const: pclk + - const: ref + - const: hclk_s_hdmirx + - const: hclk_vo1 + + power-domains: + maxItems: 1 + + resets: + maxItems: 4 + + reset-names: + items: + - const: axi + - const: apb + - const: ref + - const: biu + + memory-region: + maxItems: 1 + + hpd-gpios: + description: GPIO specifier for HPD. + maxItems: 1 + + rockchip,grf: + $ref: /schemas/types.yaml#/definitions/phandle + description: + The phandle of the syscon node for the general register file + containing HDMIRX PHY status bits. + + rockchip,vo1-grf: + $ref: /schemas/types.yaml#/definitions/phandle + description: + The phandle of the syscon node for the Video Output GRF register + to enable EDID transfer through SDAIN and SCLIN. + +required: + - compatible + - reg + - interrupts + - interrupt-names + - clocks + - clock-names + - power-domains + - resets + - pinctrl-0 + - hpd-gpios + +additionalProperties: false + +examples: + - | + #include + #include + #include + #include + #include + #include + hdmi_receiver: hdmi-receiver@fdee0000 { + compatible = "rockchip,rk3588-hdmirx-ctrler", "snps,dw-hdmi-rx"; + reg = <0xfdee0000 0x6000>; + interrupts = , + , + ; + interrupt-names = "cec", "hdmi", "dma"; + clocks = <&cru ACLK_HDMIRX>, + <&cru CLK_HDMIRX_AUD>, + <&cru CLK_CR_PARA>, + <&cru PCLK_HDMIRX>, + <&cru CLK_HDMIRX_REF>, + <&cru PCLK_S_HDMIRX>, + <&cru HCLK_VO1>; + clock-names = "aclk", + "audio", + "cr_para", + "pclk", + "ref", + "hclk_s_hdmirx", + "hclk_vo1"; + power-domains = <&power RK3588_PD_VO1>; + resets = <&cru SRST_A_HDMIRX>, <&cru SRST_P_HDMIRX>, + <&cru SRST_HDMIRX_REF>, <&cru SRST_A_HDMIRX_BIU>; + reset-names = "axi", "apb", "ref", "biu"; + memory-region = <&hdmi_receiver_cma>; + pinctrl-0 = <&hdmim1_rx_cec &hdmim1_rx_hpdin &hdmim1_rx_scl &hdmim1_rx_sda &hdmirx_5v_detection>; + pinctrl-names = "default"; + hpd-gpios = <&gpio1 22 GPIO_ACTIVE_LOW>; + };