From patchwork Fri Mar 7 09:18:56 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 871423 Received: from sender4-pp-f112.zoho.com (sender4-pp-f112.zoho.com [136.143.188.112]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 291051A841E; Fri, 7 Mar 2025 09:20:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=pass smtp.client-ip=136.143.188.112 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741339219; cv=pass; b=oxpB9JhSLluG24kxUrZVladpPnJOmM/jtY0dyhahWQkiYBzWP3qPgSuT9pVHFa2hDkop5YjRQAN4K/M8S26zou7vKvpGvLI++5jMm0vZlNMcMqw7XHotcmbya3brp8CASCe7euegaZXYy1yTigGD93CaysShtkeF9GPGlWgBV7s= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741339219; c=relaxed/simple; bh=J4FfmYBRpVCBEudFtjurRDf/1FwwQ41JEJWR6xyARfk=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=YY0WWeDYcSSHbg/XhrnejrErYuYJusO7s8jpMu4gi4gaVnU+Hj3lnCa9brKDfGck1XNf+BN3v09m6f2DOgolRdSS9l7pzDozhHNk+XaXM3jaGQutokAAPVoidW3MqVk+1A3oRSwMxpydZEl7WrzxLMdjS74jCZBI30N+cr19ie8= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (1024-bit key) header.d=collabora.com header.i=dmitry.osipenko@collabora.com header.b=TR34M9IE; arc=pass smtp.client-ip=136.143.188.112 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=collabora.com header.i=dmitry.osipenko@collabora.com header.b="TR34M9IE" ARC-Seal: i=1; a=rsa-sha256; t=1741339171; cv=none; d=zohomail.com; s=zohoarc; b=iUW3/EWAQ74pV1vuawJREJ8QOpIrvnRIOsvVDcrnldvwdD4+UQM+dgJhNI631knUkJrE2pJiXcv8vboKlBKryjwsEtOELSfarhDJxv9wJ9POm7q82Ky6uGf6GIIVud2A64gV6pAFpkaXz9EnIG4PhMRWeQ6ku1jpY2O/95ub99I= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1741339171; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:MIME-Version:Message-ID:References:Subject:Subject:To:To:Message-Id:Reply-To; bh=jMsqnCZwk+9rRlGRVtpB7byehgQbLDfm0actQbMgEdc=; b=lWYby/8QddJpS0Z3HlsCDjhRBjtM52YXAzfUFWMnoifKvDiLQSQ2WPPiGAhHtVfJHaC9vbSrlKpB7HMxOA6l3I76o9J0YuJPGlXSmcBQzQMrC25V/Q+j4FON9JmXVTPmNmd89Mg/1TfTpEG6Tg3h+gow1zf/90WdkmzTt+o17BI= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=collabora.com; spf=pass smtp.mailfrom=dmitry.osipenko@collabora.com; dmarc=pass header.from= DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; t=1741339171; s=zohomail; d=collabora.com; i=dmitry.osipenko@collabora.com; h=From:From:To:To:Cc:Cc:Subject:Subject:Date:Date:Message-ID:In-Reply-To:References:MIME-Version:Content-Transfer-Encoding:Message-Id:Reply-To; bh=jMsqnCZwk+9rRlGRVtpB7byehgQbLDfm0actQbMgEdc=; b=TR34M9IEPY5YHVCfOwY5L9cDx1/YPEhWGI0PQyTgvHAzvwBBtqdFkGzS8e0i+jM5 Wqu4fsR7qrNeMFSZEmCS7wE52hD5vFYxPDvku8ciBV0OY+YAyL66ErtVRUcJoltAEKI WAQtimg9eygbVW4+CWumyhXdyrUO+UI9s7j5Ktnk= Received: by mx.zohomail.com with SMTPS id 1741339169951285.09211468103194; Fri, 7 Mar 2025 01:19:29 -0800 (PST) From: Dmitry Osipenko To: Shreeya Patel , Heiko Stuebner , Mauro Carvalho Chehab , Hans Verkuil , Rob Herring , Krzysztof Kozlowski , Conor Dooley , jose.abreu@synopsys.com, nelson.costa@synopsys.com, shawn.wen@rock-chips.com, nicolas.dufresne@collabora.com, Sebastian Reichel Cc: kernel@collabora.com, linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, Tim Surber Subject: [PATCH v15 1/2] arm64: dts: rockchip: Add device tree support for HDMI RX Controller Date: Fri, 7 Mar 2025 12:18:56 +0300 Message-ID: <20250307091857.646581-2-dmitry.osipenko@collabora.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250307091857.646581-1-dmitry.osipenko@collabora.com> References: <20250307091857.646581-1-dmitry.osipenko@collabora.com> Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ZohoMailClient: External From: Shreeya Patel Add device tree support for Synopsys DesignWare HDMI RX Controller. Reviewed-by: Dmitry Osipenko Tested-by: Dmitry Osipenko Co-developed-by: Dingxian Wen Signed-off-by: Dingxian Wen Signed-off-by: Shreeya Patel Signed-off-by: Dmitry Osipenko --- .../arm64/boot/dts/rockchip/rk3588-extra.dtsi | 55 +++++++++++++++++++ 1 file changed, 55 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3588-extra.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-extra.dtsi index 4a950907ea6f..e18410c68530 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-extra.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588-extra.dtsi @@ -7,6 +7,30 @@ #include "rk3588-extra-pinctrl.dtsi" / { + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + /* + * The 4k HDMI capture controller works only with 32bit + * phys addresses and doesn't support IOMMU. HDMI RX CMA + * must be reserved below 4GB. + * The size of 160MB was determined as follows: + * (3840 * 2160 pixels) * (4 bytes/pixel) * (2 frames/buffer) / 10^6 = 66MB + * To ensure sufficient support for practical use-cases, + * we doubled the 66MB value. + */ + hdmi_receiver_cma: hdmi-receiver-cma { + compatible = "shared-dma-pool"; + alloc-ranges = <0x0 0x0 0x0 0xffffffff>; + size = <0x0 (160 * 0x100000)>; /* 160MiB */ + alignment = <0x0 0x40000>; /* 64K */ + no-map; + status = "disabled"; + }; + }; + usb_host1_xhci: usb@fc400000 { compatible = "rockchip,rk3588-dwc3", "snps,dwc3"; reg = <0x0 0xfc400000 0x0 0x400000>; @@ -135,6 +159,37 @@ i2s10_8ch: i2s@fde00000 { status = "disabled"; }; + hdmi_receiver: hdmi_receiver@fdee0000 { + compatible = "rockchip,rk3588-hdmirx-ctrler", "snps,dw-hdmi-rx"; + reg = <0x0 0xfdee0000 0x0 0x6000>; + power-domains = <&power RK3588_PD_VO1>; + rockchip,grf = <&sys_grf>; + rockchip,vo1-grf = <&vo1_grf>; + interrupts = , + , + ; + interrupt-names = "cec", "hdmi", "dma"; + clocks = <&cru ACLK_HDMIRX>, + <&cru CLK_HDMIRX_AUD>, + <&cru CLK_CR_PARA>, + <&cru PCLK_HDMIRX>, + <&cru CLK_HDMIRX_REF>, + <&cru PCLK_S_HDMIRX>, + <&cru HCLK_VO1>; + clock-names = "aclk", + "audio", + "cr_para", + "pclk", + "ref", + "hclk_s_hdmirx", + "hclk_vo1"; + resets = <&cru SRST_A_HDMIRX>, <&cru SRST_P_HDMIRX>, + <&cru SRST_HDMIRX_REF>, <&cru SRST_A_HDMIRX_BIU>; + reset-names = "axi", "apb", "ref", "biu"; + memory-region = <&hdmi_receiver_cma>; + status = "disabled"; + }; + pcie3x4: pcie@fe150000 { compatible = "rockchip,rk3588-pcie", "rockchip,rk3568-pcie"; #address-cells = <3>;