From patchwork Fri May 2 15:05:10 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marco Felsch X-Patchwork-Id: 886853 Received: from metis.whiteo.stw.pengutronix.de (metis.whiteo.stw.pengutronix.de [185.203.201.7]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D153225A2BE for ; Fri, 2 May 2025 15:07:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.203.201.7 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746198430; cv=none; b=mwRFbVanQKUrtta/eCO2uN3nXo/Ra7OZqAqA++JF50+yWPKJndVYcko4ZiEwyQFb8cOgvmErCRB422b3c1m63KvMzb2GCN/HRC14hLyOL8SPuaTqvLhqHRo4+PvmvoaizASQPqnlmEdF/fnfqV16dRUyPrXJExW4pzwx7MjVC9s= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746198430; c=relaxed/simple; bh=RcsCLn56etsdkBQWRFlMi/Q+MZhYwQLTyd+ncIcIZsY=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=idxWTg+WiGXMFrj83A8HUyVKIjSXsBE9dbfeAkHYtVBRkmeUyJGX27r52Aw5ckHO1D6W8EK9V1cSG98Wmx6Kfh75dIxH9QWUnY5LkUy1Auonc5sE4yIEgneoRa65ub5spoSBY4t+M6tloDKWMvzgGlSBNGjnA+qbMauRl+DZ5ys= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=pengutronix.de; spf=pass smtp.mailfrom=pengutronix.de; arc=none smtp.client-ip=185.203.201.7 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=pengutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=pengutronix.de Received: from dude02.red.stw.pengutronix.de ([2a0a:edc0:0:1101:1d::28]) by metis.whiteo.stw.pengutronix.de with esmtp (Exim 4.92) (envelope-from ) id 1uAryZ-0004HG-Bo; Fri, 02 May 2025 17:06:55 +0200 From: Marco Felsch To: nicolas.dufresne@collabora.com, benjamin.gaignard@collabora.com, p.zabel@pengutronix.de, mchehab@kernel.org, shawnguo@kernel.org, Sascha Hauer , kernel@pengutronix.de, festevam@gmail.com, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, paulk@sys-base.io, hverkuil@xs4all.nl, laurent.pinchart@ideasonboard.com, sebastian.fricke@collabora.com, ming.qian@nxp.com Cc: linux-kernel@vger.kernel.org, linux-media@vger.kernel.org, linux-rockchip@lists.infradead.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org Subject: [RFC PATCH 07/11] arm64: dts: imx8mp: fix VPU_BUS clock setting Date: Fri, 2 May 2025 17:05:10 +0200 Message-Id: <20250502150513.4169098-8-m.felsch@pengutronix.de> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20250502150513.4169098-1-m.felsch@pengutronix.de> References: <20250502150513.4169098-1-m.felsch@pengutronix.de> Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-SA-Exim-Connect-IP: 2a0a:edc0:0:1101:1d::28 X-SA-Exim-Mail-From: m.felsch@pengutronix.de X-SA-Exim-Scanned: No (on metis.whiteo.stw.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-media@vger.kernel.org The VPU_PLL clock must be set before the VPU_BUS clock which is derived from the VPU_PLL clock else the VPU_BUS clock is 300MHz and not 600MHz. Signed-off-by: Marco Felsch --- arch/arm64/boot/dts/freescale/imx8mp.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi index 97b09b647ec7..7f4bdefb3480 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi @@ -2289,8 +2289,8 @@ vpumix_blk_ctrl: blk-ctrl@38330000 { <&clk IMX8MP_CLK_VPU_G2_ROOT>, <&clk IMX8MP_CLK_VPU_VC8KE_ROOT>; clock-names = "g1", "g2", "vc8000e"; - assigned-clocks = <&clk IMX8MP_CLK_VPU_BUS>, <&clk IMX8MP_VPU_PLL>; - assigned-clock-parents = <&clk IMX8MP_VPU_PLL_OUT>; + assigned-clocks = <&clk IMX8MP_VPU_PLL>, <&clk IMX8MP_CLK_VPU_BUS>; + assigned-clock-parents = <0>, <&clk IMX8MP_VPU_PLL_OUT>; assigned-clock-rates = <600000000>, <600000000>; interconnects = <&noc IMX8MP_ICM_VPU_G1 &noc IMX8MP_ICN_VIDEO>, <&noc IMX8MP_ICM_VPU_G2 &noc IMX8MP_ICN_VIDEO>,