From patchwork Sat May 10 07:53:39 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yunfei Dong X-Patchwork-Id: 889104 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6824620FA97; Sat, 10 May 2025 07:58:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.61.82.184 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746863916; cv=none; b=du1F+hoVKt33lSp5srlmmrQtpRzaBaa8l9ytcOhvybvjVVmcvL6O56Tckedkp/CbewwWSmwP3GafIVUM6Siq0bL4qxcLgxt52z3JLkna4rtAiu6E2Mv09SCEW5lXBNzeF3bhzi6q43uQmblBNc+NqaqrhjRROtf2eiSYhQSAAME= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746863916; c=relaxed/simple; bh=CF07NLCt9NJJ7O3cB4GxJ+5CJ2C6wxcbMJnz3PIM58o=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=icnD0rFu4DPT6ePi5wzmxM/qp3AgnM/ptxcT7LDgZF0PaPdeez0QDzu1qMdOgG7xl+pDH9q/viW1V6SkdoDBulOmbaPKMm2NxfvkYdy4XjEhwXPYGk0ku8NJJ5k8bz/847SJWlMU2Ag0wHWWvxEz9oiOvyE8iUpQnqQPo9DaDLw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com; spf=pass smtp.mailfrom=mediatek.com; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b=p4nJr6Fp; arc=none smtp.client-ip=210.61.82.184 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mediatek.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="p4nJr6Fp" X-UUID: 8e15ae382d7411f082f7f7ac98dee637-20250510 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=oc/MTs6M57gUjwqUU06zo2HIplEskmKIPVViUh3uaEo=; b=p4nJr6Fp9Txscz5r2bJjosb/Xz6/8LzyOri/vuHm7h1fE/OSgTTyttsKVYBN4DcXw/PSKxiBT21fLd5zxkyhH30Dd6eR3RRb9nZxqSX6aefofRzDoNMno5xn8GCwkcXOuVUl/C7zMMIitAXLoZfVQDlaEj2T/ccmeuPT/lQ9t6Y=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.2.1, REQID:272ddfb7-ee9d-4a8d-8e45-34e394d5746b, IP:0, UR L:0,TC:0,Content:-5,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION: release,TS:-5 X-CID-META: VersionHash:0ef645f, CLOUDID:5ccedcf9-d2be-4f65-b354-0f04e3343627, B ulkID:nil,BulkQuantity:0,Recheck:0,SF:81|82|102,TC:nil,Content:0|50,EDM:-3 ,IP:nil,URL:0,File:nil,RT:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV :0,LES:1,SPR:NO,DKR:0,DKP:0,BRR:0,BRE:0,ARC:0 X-CID-BVR: 0,NGT X-CID-BAS: 0,NGT,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR X-UUID: 8e15ae382d7411f082f7f7ac98dee637-20250510 Received: from mtkmbs09n1.mediatek.inc [(172.21.101.35)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 977099244; Sat, 10 May 2025 15:58:27 +0800 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by MTKMBS09N1.mediatek.inc (172.21.101.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.39; Sat, 10 May 2025 15:58:24 +0800 Received: from mhfsdcap04.gcn.mediatek.inc (10.17.3.154) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1258.39 via Frontend Transport; Sat, 10 May 2025 15:58:23 +0800 From: Yunfei Dong To: =?utf-8?q?N=C3=ADcolas_F_=2E_R_=2E_A_=2E_Prado?= , Sebastian Fricke , Nicolas Dufresne , Hans Verkuil , AngeloGioacchino Del Regno , Benjamin Gaignard , Nathan Hebert , Daniel Almeida CC: Hsin-Yi Wang , Fritz Koenig , Daniel Vetter , Steve Cho , Yunfei Dong , , , , , , Subject: [PATCH 09/14] media: mediatek: vcodec: support 36bit iova address Date: Sat, 10 May 2025 15:53:39 +0800 Message-ID: <20250510075357.11761-10-yunfei.dong@mediatek.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20250510075357.11761-1-yunfei.dong@mediatek.com> References: <20250510075357.11761-1-yunfei.dong@mediatek.com> Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MTK: N Need to set dma mask to support 36bit iova address for decoder hardware can use 36bit address to decode for mt8196. Signed-off-by: Yunfei Dong --- .../platform/mediatek/vcodec/decoder/mtk_vcodec_dec_drv.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_drv.c b/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_drv.c index 5e312f86e652..fabf969bc8a9 100644 --- a/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_drv.c +++ b/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_drv.c @@ -388,6 +388,13 @@ static int mtk_vcodec_probe(struct platform_device *pdev) return -ENODEV; } dma_set_max_seg_size(&pdev->dev, UINT_MAX); + if (dev->chip_name == MTK_VDEC_MT8196) { + ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(36)); + if (ret) { + dev_err(&pdev->dev, "Failed to enable 36-bit DMA: %d\n", ret); + return ret; + } + } dev->fw_handler = mtk_vcodec_fw_select(dev, fw_type, DECODER); if (IS_ERR(dev->fw_handler))