From patchwork Sat May 10 07:53:32 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yunfei Dong X-Patchwork-Id: 889106 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 85DA81F1505; Sat, 10 May 2025 07:58:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.61.82.184 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746863913; cv=none; b=pq810/E9raVmvmX9ccsuw4fDvwkbOkkMwHshJC/lKNN5fVheNrZdYK6ccen8XzMYA7MhKzQzl4DlbQSkPjrRWZ4qUjNp01TFzxqAp5VzgU9JoISvxEPNt78TVH2ilP/V7086K2hnkercOCw69M9PqXqMGjm8s1TVdjlcHKcZ5V0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746863913; c=relaxed/simple; bh=uMMoqlsFJav8B+V9So7AYUSrXUd/447mapyNhYSXmFA=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=HutKHKPDbBT3aXF93rTdNVYVgNwfJcsO1KvXJJ/vWh6lMuUMc7OE/My5xExNfQiDDFzHLaEzK/QKUKSIaYfhEo7a1xOGUzb5K2Ofcb4rp8L8+G8M2l8FRVvotvRNGAu4eLp2xeFymDAH5gbW6prcdF4jWS+sy0HGTBs+p5yJTvE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com; spf=pass smtp.mailfrom=mediatek.com; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b=dceYI0VN; arc=none smtp.client-ip=210.61.82.184 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mediatek.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="dceYI0VN" X-UUID: 898c39042d7411f082f7f7ac98dee637-20250510 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=yL3lmIa6MXlJrAqrS9JxDe/7dApM3oq62eMUa7xMLyc=; b=dceYI0VNKV0sXVHxc5CZ3uSWvscaRXhitBEqYB6St4QLodXFIlUM6REkHWBptMKPUQfgsL0eC2bI9yye5JH3SiFVT+eA6Z4+gzrkau7ghgI+zgKD+3+ABrPk5ZYLr9gr8tqLB3Xp5Uz+7RVaru7FmxlxkkONrhp/dscS+BJGGAQ=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.2.1, REQID:77264fb4-495d-469f-987e-a9991517736a, IP:0, UR L:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION:r elease,TS:0 X-CID-META: VersionHash:0ef645f, CLOUDID:00cd5e51-76c0-4e62-bb75-246dfb0889c6, B ulkID:nil,BulkQuantity:0,Recheck:0,SF:81|82|102,TC:nil,Content:0|50,EDM:-3 ,IP:nil,URL:0,File:nil,RT:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV :0,LES:1,SPR:NO,DKR:0,DKP:0,BRR:0,BRE:0,ARC:0 X-CID-BVR: 0 X-CID-BAS: 0,_,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR X-UUID: 898c39042d7411f082f7f7ac98dee637-20250510 Received: from mtkmbs11n1.mediatek.inc [(172.21.101.185)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 843717898; Sat, 10 May 2025 15:58:19 +0800 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by MTKMBS09N1.mediatek.inc (172.21.101.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.39; Sat, 10 May 2025 15:58:16 +0800 Received: from mhfsdcap04.gcn.mediatek.inc (10.17.3.154) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1258.39 via Frontend Transport; Sat, 10 May 2025 15:58:15 +0800 From: Yunfei Dong To: =?utf-8?q?N=C3=ADcolas_F_=2E_R_=2E_A_=2E_Prado?= , Sebastian Fricke , Nicolas Dufresne , Hans Verkuil , AngeloGioacchino Del Regno , Benjamin Gaignard , Nathan Hebert , Daniel Almeida CC: Hsin-Yi Wang , Fritz Koenig , Daniel Vetter , Steve Cho , Yunfei Dong , , , , , , Subject: [PATCH 02/14] media: mediatek: vcodec: add decoder compatible to support mt8196 Date: Sat, 10 May 2025 15:53:32 +0800 Message-ID: <20250510075357.11761-3-yunfei.dong@mediatek.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20250510075357.11761-1-yunfei.dong@mediatek.com> References: <20250510075357.11761-1-yunfei.dong@mediatek.com> Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MTK: N MT8196 is lat single core architecture. Support its compatible and use `mtk_lat_sig_core_pdata` to initialize platform data. Signed-off-by: Yunfei Dong --- .../platform/mediatek/vcodec/decoder/mtk_vcodec_dec_drv.c | 6 ++++++ .../platform/mediatek/vcodec/decoder/mtk_vcodec_dec_drv.h | 1 + 2 files changed, 7 insertions(+) diff --git a/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_drv.c b/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_drv.c index 9247d92d431d..fa609343c168 100644 --- a/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_drv.c +++ b/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_drv.c @@ -346,6 +346,8 @@ static void mtk_vcodec_dec_get_chip_name(struct mtk_vcodec_dec_dev *vdec_dev) vdec_dev->chip_name = MTK_VDEC_MT8186; else if (of_device_is_compatible(dev->of_node, "mediatek,mt8188-vcodec-dec")) vdec_dev->chip_name = MTK_VDEC_MT8188; + else if (of_device_is_compatible(dev->of_node, "mediatek,mt8196-vcodec-dec")) + vdec_dev->chip_name = MTK_VDEC_MT8196; else vdec_dev->chip_name = MTK_VDEC_INVAL; } @@ -559,6 +561,10 @@ static const struct of_device_id mtk_vcodec_match[] = { .compatible = "mediatek,mt8188-vcodec-dec", .data = &mtk_lat_sig_core_pdata, }, + { + .compatible = "mediatek,mt8196-vcodec-dec", + .data = &mtk_lat_sig_core_pdata, + }, {}, }; diff --git a/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_drv.h b/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_drv.h index aececca7ecf8..6bdde600a167 100644 --- a/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_drv.h +++ b/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_drv.h @@ -27,6 +27,7 @@ enum mtk_vcodec_dec_chip_name { MTK_VDEC_MT8188 = 8188, MTK_VDEC_MT8192 = 8192, MTK_VDEC_MT8195 = 8195, + MTK_VDEC_MT8196 = 8196, }; /*