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[0/4] dt-bindings: imx: add nvmem property

Message ID 20220324042024.26813-1-peng.fan@oss.nxp.com
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Series dt-bindings: imx: add nvmem property | expand

Message

Peng Fan (OSS) March 24, 2022, 4:20 a.m. UTC
From: Peng Fan <peng.fan@nxp.com>

To i.MX SoC, there are many variants, such as i.MX8M Plus which
feature 4 A53, GPU, VPU, SDHC, FLEXCAN, FEC, eQOS and etc.
But i.MX8M Plus has many parts, one part may not have FLEXCAN,
the other part may not have eQOS or GPU.
But we use one device tree to support i.MX8MP including its parts,
then we need update device tree to mark the disabled IP status "disabled".

In NXP U-Boot, we hardcoded node path and runtime update device tree
status in U-Boot according to fuse value. But this method is not
scalable and need encoding all the node paths that needs check.

By introducing nvmem property for each node that needs runtime update
status property accoridng fuse value, we could use one Bootloader
code piece to support all i.MX SoCs.

The drawback is we need nvmem property for all the nodes which maybe
fused out.

Rob:
  I only include limited node bindings in this patchset, and not
  include device tree patch. Just wanna to see whether you
  agree this approach. If you agree, I'll later post device tree
  part and other dt-bindings update, such as MU, USB and etc.

  Thanks.

Example as below:

			flexcan1: can@308c0000 {
				....
				nvmem-cells = <&flexcan_disabled>;
				nvmem-cell-names = "disabled";
			};

			flexcan2: can@308d0000 {
				....
				nvmem-cells = <&flexcan_disabled>;
				nvmem-cell-names = "disabled";
			};

			ocotp: efuse@30350000 {
				compatible = "fsl,imx8mp-ocotp", "fsl,imx8mm-ocotp", "syscon";
				reg = <0x30350000 0x10000>;
				clocks = <&clk IMX8MP_CLK_OCOTP_ROOT>;
				/* For nvmem subnodes */
				#address-cells = <1>;
				#size-cells = <1>;

				m7_disabled: m7@10 {
					reg = <0x10 4>;
					bits = <21 1>;
				};

				g1_disabled: g1@10 {
					reg = <0x10 4>;
					bits = <24 1>;
				};

				g2_disabled: g2@10 {
					reg = <0x10 4>;
					bits = <25 1>;
				};

				can_disabled: can@10 {
					reg = <0x10 4>;
					bits = <28 1>;
				};

				canfd_disabled: canfd@10 {
					reg = <0x10 4>;
					bits = <29 1>;
				};

				vc8000e_disabled: vc8000e@10 {
					reg = <0x10 4>;
					bits = <30 1>;
				};

				isp1_disabled: isp1@10 {
					reg = <0x14 4>;
					bits = <0 1>;
				};

				isp2_disabled: isp2@10 {
					reg = <0x14 4>;
					bits = <1 1>;
				};

				dewrap_disabled: dewrap@10 {
					reg = <0x14 4>;
					bits = <2 1>;
				};

				npu_disabled: dewrap@10 {
					reg = <0x14 4>;
					bits = <3 1>;
				};

				dsp_disabled: dewrap@10 {
					reg = <0x14 4>;
					bits = <4 1>;
				};

				asrc_disabled: dewrap@10 {
					reg = <0x14 4>;
					bits = <5 1>;
				};

				gpu2d_disabled: gpu2d@10 {
					reg = <0x14 4>;
					bits = <6 1>;
				};

				gpu3d_disabled: gpu3d@10 {
					reg = <0x14 4>;
					bits = <7 1>;
				};

				usb1_disabled: usb1@10 {
					reg = <0x14 4>;
					bits = <8 1>;
				};

				usb2_disabled: usb2@10 {
					reg = <0x14 4>;
					bits = <9 1>;
				};

				pcie1_disabled: pcie1@10 {
					reg = <0x14 4>;
					bits = <11 1>;
				};

				enet1_disabled: enet1@10 {
					reg = <0x14 4>;
					bits = <13 1>;
				};

				enet2_disabled: enet2@10 {
					reg = <0x14 4>;
					bits = <14 1>;
				};

				csi1_disabled: csi1@10 {
					reg = <0x14 4>;
					bits = <15 1>;
				};

				csi2_disabled: csi1@10 {
					reg = <0x14 4>;
					bits = <16 1>;
				};

				dsi1_disabled: dsi1@10 {
					reg = <0x14 4>;
					bits = <17 1>;
				};

				lvds1_disabled: lvds1@10 {
					reg = <0x14 4>;
					bits = <19 1>;
				};

				lvds2_disabled: lvds1@10 {
					reg = <0x14 4>;
					bits = <19 1>;
				};

				eth_mac1: mac-address@90 {
					reg = <0x90 6>;
				};

				eth_mac2: mac-address@96 {
					reg = <0x96 6>;
				};

			};


Peng Fan (4):
  dt-bindings: can: fsl,flexcan: introduce nvmem property
  dt-bindings: net: fsl,fec: introduce nvmem property
  dt-bindings: mmc: imx-esdhc: introduce nvmem property
  dt-bindings: net: imx-dwmac: introduce nvmem property

 Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.yaml | 9 +++++++++
 .../devicetree/bindings/net/can/fsl,flexcan.yaml         | 9 +++++++++
 Documentation/devicetree/bindings/net/fsl,fec.yaml       | 9 +++++++++
 Documentation/devicetree/bindings/net/nxp,dwmac-imx.yaml | 9 +++++++++
 4 files changed, 36 insertions(+)

Comments

Peng Fan April 2, 2022, 1:52 a.m. UTC | #1
> Subject: Re: [PATCH 0/4] dt-bindings: imx: add nvmem property
> 
> On Thu, Mar 24, 2022 at 12:11:04PM +0100, Uwe Kleine-König wrote:
> > Hello,
> >
> > On Thu, Mar 24, 2022 at 12:20:20PM +0800, Peng Fan (OSS) wrote:
> > > From: Peng Fan <peng.fan@nxp.com>
> > >
> > > To i.MX SoC, there are many variants, such as i.MX8M Plus which
> > > feature 4 A53, GPU, VPU, SDHC, FLEXCAN, FEC, eQOS and etc.
> > > But i.MX8M Plus has many parts, one part may not have FLEXCAN, the
> > > other part may not have eQOS or GPU.
> > > But we use one device tree to support i.MX8MP including its parts,
> > > then we need update device tree to mark the disabled IP status
> "disabled".
> > >
> > > In NXP U-Boot, we hardcoded node path and runtime update device tree
> > > status in U-Boot according to fuse value. But this method is not
> > > scalable and need encoding all the node paths that needs check.
> > >
> > > By introducing nvmem property for each node that needs runtime
> > > update status property accoridng fuse value, we could use one
> > > Bootloader code piece to support all i.MX SoCs.
> > >
> > > The drawback is we need nvmem property for all the nodes which maybe
> > > fused out.
> >
> > I'd rather not have that in an official binding as the syntax is
> > orthogonal to status = "..." but the semantic isn't. Also if we want
> > something like that, I'd rather not want to adapt all bindings, but
> > would like to see this being generic enough to be described in a
> > single catch-all binding.
> >
> > I also wonder if it would be nicer to abstract that as something like:
> >
> > 	/ {
> > 		fuse-info {
> > 			compatible = "otp-fuse-info";
> >
> > 			flexcan {
> > 				devices = <&flexcan1>, <&flexcan2>;
> > 				nvmem-cells = <&flexcan_disabled>;
> > 				nvmem-cell-names = "disabled";
> > 			};
> >
> > 			m7 {
> > 				....
> > 			};
> > 		};
> > 	};
> >
> > as then the driver evaluating this wouldn't need to iterate over the
> > whole dtb but just over this node. But I'd still keep this private to
> > the bootloader and not describe it in the generic binding.
> 
> There's been discussions (under the system DT umbrella mostly) about
> bindings for peripheral enable/disable control/status. Most of the time it is in
> context of device assignment to secure/non-secure world or partitions in a
> system (via a partitioning hypervisor).
> 
> This feels like the same thing and could use the same binding. But someone
> has to take into account all the uses and come up with something. One off
> solutions are a NAK.

Loop Stefano.

Per my understanding, system device tree is not a runtime generated device
tree, in case I am wrong.

To i.MX, one SoC has many different parts, one kind part may not have
VPU, another part may not have GPU, another part may be a full feature
one. We have a device tree for the full feature one, but we not wanna
introduce other static device tree files for non-full feature parts.

So we let bootloader to runtime setting status of a device node according
to fuse info that read out by bootloader at runtime.

I think my case is different with system device tree, and maybe NXP i.MX
specific. So I would introduce a vendor compatible node, following Uwe's
suggestion. We Just need such binding doc and device node in Linux kernel
tree. The code to scan this node is in U-Boot.

/ {
 		fuse-info {
 			compatible = "fsl,otp-fuse-info";

 			flexcan {
 				devices = <&flexcan1>, <&flexcan2>;
 				nvmem-cells = <&flexcan_disabled>;
 				nvmem-cell-names = "disabled";
 			};

 			m7 {
 				....
 			};
		};
	};

Thanks,
Peng.

> 
> Rob