[V8,0/8] Add minimal boot support for IPQ5018

The IPQ5018 is Qualcomm's 802.11ax SoC for Routers,
Gateways and Access Points.

This series adds minimal board boot support for ipq5018-rdp432-c2 board.

[v8]   Changed only in patch 4/8
		Fixed Kconfig to add COMPILE_TEST and removed header of.h.
	        Instead using mod_devicetable.h. Added Linus reviewed-by

[v7]   Fixed tz reserved region size in patch 7/8

[v6]   Fixed patch [4/8] pinctrl driver for rebase issue.

[v5]
       Added Reviewed-by tags from Krzysztof Kozlowski.
       Changed patch [6/8] with [1] since its already Acked
       Rebased patch [4/8] on top of [2] and fixed other comments
       Fixed commit log for patch [7/8]
       Fixed comments for patch [2/8]

[1] https://patchwork.kernel.org/project/linux-arm-msm/patch/1678164097-13247-4-git-send-email-quic_mmanikan@quicinc.com/
[2] https://lore.kernel.org/r/1683718725-14869-1-git-send-email-quic_rohiagar@quicinc.com
       
[v4]
       Fixed all comments for clocks, schema, dts
       Added Reviewed-by tags.

[v3]
	Fixed all comments for clocks, schema fixes
        Picked up Reviewed-by from Bjorn for pinctrl driver

[v2]
	Fixed all comments and rebased for TOT.

Manikanta Mylavarapu (1):
  dt-bindings: scm: Add compatible for IPQ5018

Sricharan Ramabadhran (7):
  dt-bindings: arm64: Add IPQ5018 clock and reset
  clk: qcom: Add Global Clock controller (GCC) driver for IPQ5018
  dt-bindings: pinctrl: qcom: Add support for ipq5018
  pinctrl: qcom: Add IPQ5018 pinctrl driver
  dt-bindings: qcom: Add ipq5018 bindings
  arm64: dts: Add ipq5018 SoC and rdp432-c2 board support
  arm64: defconfig: Enable IPQ5018 SoC base configs

 .../devicetree/bindings/arm/qcom.yaml         |    7 +
 .../bindings/clock/qcom,ipq5018-gcc.yaml      |   63 +
 .../bindings/firmware/qcom,scm.yaml           |    1 +
 .../bindings/pinctrl/qcom,ipq5018-tlmm.yaml   |  127 +
 arch/arm64/boot/dts/qcom/Makefile             |    1 +
 .../arm64/boot/dts/qcom/ipq5018-rdp432-c2.dts |   72 +
 arch/arm64/boot/dts/qcom/ipq5018.dtsi         |  250 ++
 arch/arm64/configs/defconfig                  |    3 +
 drivers/clk/qcom/Kconfig                      |   10 +-
 drivers/clk/qcom/Makefile                     |    1 +
 drivers/clk/qcom/gcc-ipq5018.c                | 3731 +++++++++++++++++
 drivers/pinctrl/qcom/Kconfig                  |   11 +
 drivers/pinctrl/qcom/Makefile                 |    1 +
 drivers/pinctrl/qcom/pinctrl-ipq5018.c        |  783 ++++
 include/dt-bindings/clock/qcom,gcc-ipq5018.h  |  183 +
 include/dt-bindings/reset/qcom,gcc-ipq5018.h  |  122 +
 16 files changed, 5364 insertions(+), 2 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/clock/qcom,ipq5018-gcc.yaml
 create mode 100644 Documentation/devicetree/bindings/pinctrl/qcom,ipq5018-tlmm.yaml
 create mode 100644 arch/arm64/boot/dts/qcom/ipq5018-rdp432-c2.dts
 create mode 100644 arch/arm64/boot/dts/qcom/ipq5018.dtsi
 create mode 100644 drivers/clk/qcom/gcc-ipq5018.c
 create mode 100644 drivers/pinctrl/qcom/pinctrl-ipq5018.c
 create mode 100644 include/dt-bindings/clock/qcom,gcc-ipq5018.h
 create mode 100644 include/dt-bindings/reset/qcom,gcc-ipq5018.h

On Fri, Jun 2, 2023 at 11:24 AM Sricharan Ramabadhran
<quic_srichara@quicinc.com> wrote:
>
> Add support for the global clock controller found on IPQ5018
> based devices.

...

>  config IPQ_GCC_5332
>         tristate "IPQ5332 Global Clock Controller"
>         depends on ARM64 || COMPILE_TEST
>         help
>           Support for the global clock controller on ipq5332 devices.
> -         Say Y if you want to use peripheral devices such as UART, SPI,
> -         i2c, USB, SD/eMMC, etc.

Nothing in the commit message about this. Please, elaborate.

...

> +#include <linux/kernel.h>
> +#include <linux/err.h>
> +#include <linux/platform_device.h>
> +#include <linux/module.h>
> +#include <linux/of.h>
> +#include <linux/of_device.h>
> +#include <linux/clk-provider.h>
> +#include <linux/regmap.h>
> +#include <linux/reset-controller.h>

Why not keep this ordered?

Missing bits.h and maybe others, but in an unordered list it's harder to check.

...

> +                       &gpll4_main.clkr.hw

Can we keep trailing comma here and in similar cases, like

> +                       &ubi32_pll_main.clkr.hw
> +                       &gpll0_main.clkr.hw

(and many others)?

On 6/2/2023 6:41 PM, Andy Shevchenko wrote:
> On Fri, Jun 2, 2023 at 11:24 AM Sricharan Ramabadhran
> <quic_srichara@quicinc.com> wrote:
>>
>> Add support for the global clock controller found on IPQ5018
>> based devices.
> 
> ...
> 
>>   config IPQ_GCC_5332
>>          tristate "IPQ5332 Global Clock Controller"
>>          depends on ARM64 || COMPILE_TEST
>>          help
>>            Support for the global clock controller on ipq5332 devices.
>> -         Say Y if you want to use peripheral devices such as UART, SPI,
>> -         i2c, USB, SD/eMMC, etc.
> 
> Nothing in the commit message about this. Please, elaborate.
> 
> ...

  oops, unintended change. Not sure how this crept in.
  Thanks for catching it, will remove this.

> 
>> +#include <linux/kernel.h>
>> +#include <linux/err.h>
>> +#include <linux/platform_device.h>
>> +#include <linux/module.h>
>> +#include <linux/of.h>
>> +#include <linux/of_device.h>
>> +#include <linux/clk-provider.h>
>> +#include <linux/regmap.h>
>> +#include <linux/reset-controller.h>
> 
> Why not keep this ordered?
> 
> Missing bits.h and maybe others, but in an unordered list it's harder to check.
> 

  sure, will order it.

> ...
> 
>> +                       &gpll4_main.clkr.hw
> 
> Can we keep trailing comma here and in similar cases, like
> 
>> +                       &ubi32_pll_main.clkr.hw
>> +                       &gpll0_main.clkr.hw
> 
> (and many others)?
> 

  ok, will fix it.

Regards,
  Sricharan