| Message ID | cover.1722847198.git.unicorn_wang@outlook.com |
|---|---|
| Headers | show |
| Series | mmc: sdhci-of-dwcmshc: Add Sophgo SG2042 support | expand |
On 5/08/24 12:17, Chen Wang wrote: > From: Chen Wang <unicorn_wang@outlook.com> > > In addition to the required core clock and optional > bus clock, the soc will expand its own clocks, so > the bulk clock mechanism is abstracted. > > Note, I call the bulk clocks as "other clocks" due > to the bus clock has been called as "optional". > > Signed-off-by: Chen Wang <unicorn_wang@outlook.com> > Tested-by: Drew Fustini <drew@pdp7.com> # TH1520 > Tested-by: Inochi Amaoto <inochiama@outlook.com> # Duo and Huashan Pi Acked-by: Adrian Hunter <adrian.hunter@intel.com> > --- > drivers/mmc/host/sdhci-of-dwcmshc.c | 90 +++++++++++++++-------------- > 1 file changed, 48 insertions(+), 42 deletions(-) > > diff --git a/drivers/mmc/host/sdhci-of-dwcmshc.c b/drivers/mmc/host/sdhci-of-dwcmshc.c > index e79aa4b3b6c3..35401616fb2e 100644 > --- a/drivers/mmc/host/sdhci-of-dwcmshc.c > +++ b/drivers/mmc/host/sdhci-of-dwcmshc.c > @@ -108,7 +108,6 @@ > #define DLL_LOCK_WO_TMOUT(x) \ > ((((x) & DWCMSHC_EMMC_DLL_LOCKED) == DWCMSHC_EMMC_DLL_LOCKED) && \ > (((x) & DWCMSHC_EMMC_DLL_TIMEOUT) == 0)) > -#define RK35xx_MAX_CLKS 3 > > /* PHY register area pointer */ > #define DWC_MSHC_PTR_PHY_R 0x300 > @@ -199,23 +198,54 @@ enum dwcmshc_rk_type { > }; > > struct rk35xx_priv { > - /* Rockchip specified optional clocks */ > - struct clk_bulk_data rockchip_clks[RK35xx_MAX_CLKS]; > struct reset_control *reset; > enum dwcmshc_rk_type devtype; > u8 txclk_tapnum; > }; > > +#define DWCMSHC_MAX_OTHER_CLKS 3 > + > struct dwcmshc_priv { > struct clk *bus_clk; > int vendor_specific_area1; /* P_VENDOR_SPECIFIC_AREA1 reg */ > int vendor_specific_area2; /* P_VENDOR_SPECIFIC_AREA2 reg */ > > + int num_other_clks; > + struct clk_bulk_data other_clks[DWCMSHC_MAX_OTHER_CLKS]; > + > void *priv; /* pointer to SoC private stuff */ > u16 delay_line; > u16 flags; > }; > > +static int dwcmshc_get_enable_other_clks(struct device *dev, > + struct dwcmshc_priv *priv, > + int num_clks, > + const char * const clk_ids[]) > +{ > + int err; > + > + if (num_clks > DWCMSHC_MAX_OTHER_CLKS) > + return -EINVAL; > + > + for (int i = 0; i < num_clks; i++) > + priv->other_clks[i].id = clk_ids[i]; > + > + err = devm_clk_bulk_get_optional(dev, num_clks, priv->other_clks); > + if (err) { > + dev_err(dev, "failed to get clocks %d\n", err); > + return err; > + } > + > + err = clk_bulk_prepare_enable(num_clks, priv->other_clks); > + if (err) > + dev_err(dev, "failed to enable clocks %d\n", err); > + > + priv->num_other_clks = num_clks; > + > + return err; > +} > + > /* > * If DMA addr spans 128MB boundary, we split the DMA transfer into two > * so that each DMA transfer doesn't exceed the boundary. > @@ -1036,8 +1066,9 @@ static void dwcmshc_cqhci_init(struct sdhci_host *host, struct platform_device * > > static int dwcmshc_rk35xx_init(struct sdhci_host *host, struct dwcmshc_priv *dwc_priv) > { > - int err; > + static const char * const clk_ids[] = {"axi", "block", "timer"}; > struct rk35xx_priv *priv = dwc_priv->priv; > + int err; > > priv->reset = devm_reset_control_array_get_optional_exclusive(mmc_dev(host->mmc)); > if (IS_ERR(priv->reset)) { > @@ -1046,21 +1077,10 @@ static int dwcmshc_rk35xx_init(struct sdhci_host *host, struct dwcmshc_priv *dwc > return err; > } > > - priv->rockchip_clks[0].id = "axi"; > - priv->rockchip_clks[1].id = "block"; > - priv->rockchip_clks[2].id = "timer"; > - err = devm_clk_bulk_get_optional(mmc_dev(host->mmc), RK35xx_MAX_CLKS, > - priv->rockchip_clks); > - if (err) { > - dev_err(mmc_dev(host->mmc), "failed to get clocks %d\n", err); > - return err; > - } > - > - err = clk_bulk_prepare_enable(RK35xx_MAX_CLKS, priv->rockchip_clks); > - if (err) { > - dev_err(mmc_dev(host->mmc), "failed to enable clocks %d\n", err); > + err = dwcmshc_get_enable_other_clks(mmc_dev(host->mmc), dwc_priv, > + ARRAY_SIZE(clk_ids), clk_ids); > + if (err) > return err; > - } > > if (of_property_read_u8(mmc_dev(host->mmc)->of_node, "rockchip,txclk-tapnum", > &priv->txclk_tapnum)) > @@ -1280,9 +1300,7 @@ static int dwcmshc_probe(struct platform_device *pdev) > err_clk: > clk_disable_unprepare(pltfm_host->clk); > clk_disable_unprepare(priv->bus_clk); > - if (rk_priv) > - clk_bulk_disable_unprepare(RK35xx_MAX_CLKS, > - rk_priv->rockchip_clks); > + clk_bulk_disable_unprepare(priv->num_other_clks, priv->other_clks); > free_pltfm: > sdhci_pltfm_free(pdev); > return err; > @@ -1304,7 +1322,6 @@ static void dwcmshc_remove(struct platform_device *pdev) > struct sdhci_host *host = platform_get_drvdata(pdev); > struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); > struct dwcmshc_priv *priv = sdhci_pltfm_priv(pltfm_host); > - struct rk35xx_priv *rk_priv = priv->priv; > > pm_runtime_get_sync(&pdev->dev); > pm_runtime_disable(&pdev->dev); > @@ -1316,9 +1333,7 @@ static void dwcmshc_remove(struct platform_device *pdev) > > clk_disable_unprepare(pltfm_host->clk); > clk_disable_unprepare(priv->bus_clk); > - if (rk_priv) > - clk_bulk_disable_unprepare(RK35xx_MAX_CLKS, > - rk_priv->rockchip_clks); > + clk_bulk_disable_unprepare(priv->num_other_clks, priv->other_clks); > sdhci_pltfm_free(pdev); > } > > @@ -1328,7 +1343,6 @@ static int dwcmshc_suspend(struct device *dev) > struct sdhci_host *host = dev_get_drvdata(dev); > struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); > struct dwcmshc_priv *priv = sdhci_pltfm_priv(pltfm_host); > - struct rk35xx_priv *rk_priv = priv->priv; > int ret; > > pm_runtime_resume(dev); > @@ -1347,9 +1361,7 @@ static int dwcmshc_suspend(struct device *dev) > if (!IS_ERR(priv->bus_clk)) > clk_disable_unprepare(priv->bus_clk); > > - if (rk_priv) > - clk_bulk_disable_unprepare(RK35xx_MAX_CLKS, > - rk_priv->rockchip_clks); > + clk_bulk_disable_unprepare(priv->num_other_clks, priv->other_clks); > > return ret; > } > @@ -1359,7 +1371,6 @@ static int dwcmshc_resume(struct device *dev) > struct sdhci_host *host = dev_get_drvdata(dev); > struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); > struct dwcmshc_priv *priv = sdhci_pltfm_priv(pltfm_host); > - struct rk35xx_priv *rk_priv = priv->priv; > int ret; > > ret = clk_prepare_enable(pltfm_host->clk); > @@ -1372,29 +1383,24 @@ static int dwcmshc_resume(struct device *dev) > goto disable_clk; > } > > - if (rk_priv) { > - ret = clk_bulk_prepare_enable(RK35xx_MAX_CLKS, > - rk_priv->rockchip_clks); > - if (ret) > - goto disable_bus_clk; > - } > + ret = clk_bulk_prepare_enable(priv->num_other_clks, priv->other_clks); > + if (ret) > + goto disable_bus_clk; > > ret = sdhci_resume_host(host); > if (ret) > - goto disable_rockchip_clks; > + goto disable_other_clks; > > if (host->mmc->caps2 & MMC_CAP2_CQE) { > ret = cqhci_resume(host->mmc); > if (ret) > - goto disable_rockchip_clks; > + goto disable_other_clks; > } > > return 0; > > -disable_rockchip_clks: > - if (rk_priv) > - clk_bulk_disable_unprepare(RK35xx_MAX_CLKS, > - rk_priv->rockchip_clks); > +disable_other_clks: > + clk_bulk_disable_unprepare(priv->num_other_clks, priv->other_clks); > disable_bus_clk: > if (!IS_ERR(priv->bus_clk)) > clk_disable_unprepare(priv->bus_clk);
On 5/08/24 12:17, Chen Wang wrote: > From: Chen Wang <unicorn_wang@outlook.com> > > Different socs have initialization operations in > the probe process, which are summarized as functions. > > This patch first factor out init function for th1520. > > Signed-off-by: Chen Wang <unicorn_wang@outlook.com> > Reviewed-by: Drew Fustini <drew@pdp7.com> > Tested-by: Drew Fustini <drew@pdp7.com> # TH1520 > Tested-by: Inochi Amaoto <inochiama@outlook.com> # Duo and Huashan Pi Acked-by: Adrian Hunter <adrian.hunter@intel.com> > --- > drivers/mmc/host/sdhci-of-dwcmshc.c | 51 +++++++++++++++++------------ > 1 file changed, 30 insertions(+), 21 deletions(-) > > diff --git a/drivers/mmc/host/sdhci-of-dwcmshc.c b/drivers/mmc/host/sdhci-of-dwcmshc.c > index a002636d51fd..b272ec2ab232 100644 > --- a/drivers/mmc/host/sdhci-of-dwcmshc.c > +++ b/drivers/mmc/host/sdhci-of-dwcmshc.c > @@ -830,6 +830,35 @@ static void th1520_sdhci_reset(struct sdhci_host *host, u8 mask) > } > } > > +static int th1520_init(struct device *dev, > + struct sdhci_host *host, > + struct dwcmshc_priv *dwc_priv) > +{ > + dwc_priv->delay_line = PHY_SDCLKDL_DC_DEFAULT; > + > + if (device_property_read_bool(dev, "mmc-ddr-1_8v") || > + device_property_read_bool(dev, "mmc-hs200-1_8v") || > + device_property_read_bool(dev, "mmc-hs400-1_8v")) > + dwc_priv->flags |= FLAG_IO_FIXED_1V8; > + else > + dwc_priv->flags &= ~FLAG_IO_FIXED_1V8; > + > + /* > + * start_signal_voltage_switch() will try 3.3V first > + * then 1.8V. Use SDHCI_SIGNALING_180 rather than > + * SDHCI_SIGNALING_330 to avoid setting voltage to 3.3V > + * in sdhci_start_signal_voltage_switch(). > + */ > + if (dwc_priv->flags & FLAG_IO_FIXED_1V8) { > + host->flags &= ~SDHCI_SIGNALING_330; > + host->flags |= SDHCI_SIGNALING_180; > + } > + > + sdhci_enable_v4_mode(host); > + > + return 0; > +} > + > static void cv18xx_sdhci_reset(struct sdhci_host *host, u8 mask) > { > struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); > @@ -1231,27 +1260,7 @@ static int dwcmshc_probe(struct platform_device *pdev) > } > > if (pltfm_data == &sdhci_dwcmshc_th1520_pdata) { > - priv->delay_line = PHY_SDCLKDL_DC_DEFAULT; > - > - if (device_property_read_bool(dev, "mmc-ddr-1_8v") || > - device_property_read_bool(dev, "mmc-hs200-1_8v") || > - device_property_read_bool(dev, "mmc-hs400-1_8v")) > - priv->flags |= FLAG_IO_FIXED_1V8; > - else > - priv->flags &= ~FLAG_IO_FIXED_1V8; > - > - /* > - * start_signal_voltage_switch() will try 3.3V first > - * then 1.8V. Use SDHCI_SIGNALING_180 rather than > - * SDHCI_SIGNALING_330 to avoid setting voltage to 3.3V > - * in sdhci_start_signal_voltage_switch(). > - */ > - if (priv->flags & FLAG_IO_FIXED_1V8) { > - host->flags &= ~SDHCI_SIGNALING_330; > - host->flags |= SDHCI_SIGNALING_180; > - } > - > - sdhci_enable_v4_mode(host); > + th1520_init(dev, host, priv); > } > > #ifdef CONFIG_ACPI
On 5/08/24 12:18, Chen Wang wrote: > From: Chen Wang <unicorn_wang@outlook.com> > > Abstract dwcmshc_pltfm_data to hold the sdhci_pltfm_data > plus some comoon operations of soc such as init/postinit. > > Signed-off-by: Chen Wang <unicorn_wang@outlook.com> > Tested-by: Drew Fustini <drew@pdp7.com> # TH1520 > Tested-by: Inochi Amaoto <inochiama@outlook.com> # Duo and Huashan Pi Acked-by: Adrian Hunter <adrian.hunter@intel.com> > --- > drivers/mmc/host/sdhci-of-dwcmshc.c | 81 +++++++++++++++++------------ > 1 file changed, 48 insertions(+), 33 deletions(-) > > diff --git a/drivers/mmc/host/sdhci-of-dwcmshc.c b/drivers/mmc/host/sdhci-of-dwcmshc.c > index 55fba5ef37ba..16f420994519 100644 > --- a/drivers/mmc/host/sdhci-of-dwcmshc.c > +++ b/drivers/mmc/host/sdhci-of-dwcmshc.c > @@ -218,6 +218,12 @@ struct dwcmshc_priv { > u16 flags; > }; > > +struct dwcmshc_pltfm_data { > + const struct sdhci_pltfm_data pdata; > + int (*init)(struct device *dev, struct sdhci_host *host, struct dwcmshc_priv *dwc_priv); > + void (*postinit)(struct sdhci_host *host, struct dwcmshc_priv *dwc_priv); > +}; > + > static int dwcmshc_get_enable_other_clks(struct device *dev, > struct dwcmshc_priv *priv, > int num_clks, > @@ -1048,39 +1054,52 @@ static const struct sdhci_ops sdhci_dwcmshc_cv18xx_ops = { > .platform_execute_tuning = cv18xx_sdhci_execute_tuning, > }; > > -static const struct sdhci_pltfm_data sdhci_dwcmshc_pdata = { > - .ops = &sdhci_dwcmshc_ops, > - .quirks = SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN, > - .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN, > +static const struct dwcmshc_pltfm_data sdhci_dwcmshc_pdata = { > + .pdata = { > + .ops = &sdhci_dwcmshc_ops, > + .quirks = SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN, > + .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN, > + }, > }; > > #ifdef CONFIG_ACPI > -static const struct sdhci_pltfm_data sdhci_dwcmshc_bf3_pdata = { > - .ops = &sdhci_dwcmshc_ops, > - .quirks = SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN, > - .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN | > - SDHCI_QUIRK2_ACMD23_BROKEN, > +static const struct dwcmshc_pltfm_data sdhci_dwcmshc_bf3_pdata = { > + .pdata = { > + .ops = &sdhci_dwcmshc_ops, > + .quirks = SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN, > + .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN | > + SDHCI_QUIRK2_ACMD23_BROKEN, > + }, > }; > #endif > > -static const struct sdhci_pltfm_data sdhci_dwcmshc_rk35xx_pdata = { > - .ops = &sdhci_dwcmshc_rk35xx_ops, > - .quirks = SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN | > - SDHCI_QUIRK_BROKEN_TIMEOUT_VAL, > - .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN | > - SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN, > +static const struct dwcmshc_pltfm_data sdhci_dwcmshc_rk35xx_pdata = { > + .pdata = { > + .ops = &sdhci_dwcmshc_rk35xx_ops, > + .quirks = SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN | > + SDHCI_QUIRK_BROKEN_TIMEOUT_VAL, > + .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN | > + SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN, > + }, > + .init = dwcmshc_rk35xx_init, > + .postinit = dwcmshc_rk35xx_postinit, > }; > > -static const struct sdhci_pltfm_data sdhci_dwcmshc_th1520_pdata = { > - .ops = &sdhci_dwcmshc_th1520_ops, > - .quirks = SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN, > - .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN, > +static const struct dwcmshc_pltfm_data sdhci_dwcmshc_th1520_pdata = { > + .pdata = { > + .ops = &sdhci_dwcmshc_th1520_ops, > + .quirks = SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN, > + .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN, > + }, > + .init = th1520_init, > }; > > -static const struct sdhci_pltfm_data sdhci_dwcmshc_cv18xx_pdata = { > - .ops = &sdhci_dwcmshc_cv18xx_ops, > - .quirks = SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN, > - .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN, > +static const struct dwcmshc_pltfm_data sdhci_dwcmshc_cv18xx_pdata = { > + .pdata = { > + .ops = &sdhci_dwcmshc_cv18xx_ops, > + .quirks = SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN, > + .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN, > + }, > }; > > static const struct cqhci_host_ops dwcmshc_cqhci_ops = { > @@ -1196,7 +1215,7 @@ static int dwcmshc_probe(struct platform_device *pdev) > struct sdhci_pltfm_host *pltfm_host; > struct sdhci_host *host; > struct dwcmshc_priv *priv; > - const struct sdhci_pltfm_data *pltfm_data; > + const struct dwcmshc_pltfm_data *pltfm_data; > int err; > u32 extra, caps; > > @@ -1206,7 +1225,7 @@ static int dwcmshc_probe(struct platform_device *pdev) > return -ENODEV; > } > > - host = sdhci_pltfm_init(pdev, pltfm_data, > + host = sdhci_pltfm_init(pdev, &pltfm_data->pdata, > sizeof(struct dwcmshc_priv)); > if (IS_ERR(host)) > return PTR_ERR(host); > @@ -1251,16 +1270,12 @@ static int dwcmshc_probe(struct platform_device *pdev) > host->mmc_host_ops.hs400_enhanced_strobe = dwcmshc_hs400_enhanced_strobe; > host->mmc_host_ops.execute_tuning = dwcmshc_execute_tuning; > > - if (pltfm_data == &sdhci_dwcmshc_rk35xx_pdata) { > - err = dwcmshc_rk35xx_init(dev, host, priv); > + if (pltfm_data->init) { > + err = pltfm_data->init(&pdev->dev, host, priv); > if (err) > goto err_clk; > } > > - if (pltfm_data == &sdhci_dwcmshc_th1520_pdata) { > - th1520_init(dev, host, priv); > - } > - > #ifdef CONFIG_ACPI > if (pltfm_data == &sdhci_dwcmshc_bf3_pdata) > sdhci_enable_v4_mode(host); > @@ -1288,8 +1303,8 @@ static int dwcmshc_probe(struct platform_device *pdev) > dwcmshc_cqhci_init(host, pdev); > } > > - if (pltfm_data == &sdhci_dwcmshc_rk35xx_pdata) > - dwcmshc_rk35xx_postinit(host, priv); > + if (pltfm_data->postinit) > + pltfm_data->postinit(host, priv); > > err = __sdhci_add_host(host); > if (err)
On Mon, 5 Aug 2024 at 11:15, Chen Wang <unicornxw@gmail.com> wrote: > > From: Chen Wang <unicorn_wang@outlook.com> > > This patchset is composed of two parts: > - one is the improvement of the sdhci-of-dwcmshc framework, > - the other is the support for sg2042 based on the improvement of the > framework. > The reason for merging the two parts into one patchset is mainly to > facilitate review, especially to facilitate viewing why we need to > improve the framework and what benefits it will bring to us. > > When I tried to add a new soc(SG2042) to sdhci-of-dwcmshc, I found > that the existing driver code could be optimized to facilitate expansion > for the new soc. Patch 1 ~ Patch 5 is for this. > > Patch 6 ~ 7 are adding support for the mmc controller for Sophgo SG2042. > Adding corresponding new compatible strings, and implement > custom callbacks for SG2042 based on new framework. > > Patch 8 is the change for DTS. > > By the way, although I believe this patch only optimizes the framework > of the code and does not change the specific logic, simple verification > is certainly better. Since I don't have rk35xx/th1520 related hardware, > it would be greatly appreciated if someone could help verify it. > > --- > > Changes in v6: > > The patch series is based on latest 'next' branch of [mmc-git]. > > - Some minor improvements based on Adrian's review suggestions. > - Added Reviewed-by and Tested-by signatures from Conor/Drew/Inochi. > Patch 1 -> 7 applied for next, thanks! Kind regards Uffe
On Mon, 5 Aug 2024 17:15:18 +0800, Chen Wang wrote: > From: Chen Wang <unicorn_wang@outlook.com> > > This patchset is composed of two parts: > - one is the improvement of the sdhci-of-dwcmshc framework, > - the other is the support for sg2042 based on the improvement of the > framework. > The reason for merging the two parts into one patchset is mainly to > facilitate review, especially to facilitate viewing why we need to > improve the framework and what benefits it will bring to us. > > [...] Applied to sg2042/for-next, thanks! [8/8] riscv: sophgo: dts: add mmc controllers for SG2042 SoC https://github.com/sophgo/linux/commit/06b2359ee13a0e8267c1777838ac8b66ca667237 Thanks, Inochi
From: Chen Wang <unicorn_wang@outlook.com> This patchset is composed of two parts: - one is the improvement of the sdhci-of-dwcmshc framework, - the other is the support for sg2042 based on the improvement of the framework. The reason for merging the two parts into one patchset is mainly to facilitate review, especially to facilitate viewing why we need to improve the framework and what benefits it will bring to us. When I tried to add a new soc(SG2042) to sdhci-of-dwcmshc, I found that the existing driver code could be optimized to facilitate expansion for the new soc. Patch 1 ~ Patch 5 is for this. Patch 6 ~ 7 are adding support for the mmc controller for Sophgo SG2042. Adding corresponding new compatible strings, and implement custom callbacks for SG2042 based on new framework. Patch 8 is the change for DTS. By the way, although I believe this patch only optimizes the framework of the code and does not change the specific logic, simple verification is certainly better. Since I don't have rk35xx/th1520 related hardware, it would be greatly appreciated if someone could help verify it. --- Changes in v6: The patch series is based on latest 'next' branch of [mmc-git]. - Some minor improvements based on Adrian's review suggestions. - Added Reviewed-by and Tested-by signatures from Conor/Drew/Inochi. Changes in v5: The patch series is based on latest 'next' branch of [mmc-git]. You can simply review or test the patches at the link [5]. - Based on Adrian's suggestion, split the first part of the patch into 5. - Updated bindings and DTS as per suggestion from Krzysztof, Jisheng and Conor. Changes in v4: The patch series is based on latest 'next' branch of [mmc-git]. You can simply review or test the patches at the link [4]. Improved the dirvier code as per comments from Adrian Hunter, drop moving position and renaming for some helper functions. Put the sg2042 support as part of this series, improve the bindings and code as per comments from last review. Changes in v3: The patch series is based on latest 'next' branch of [mmc-git]. You can simply review or test the patches at the link [3]. Improved the dirvier code as per comments from Adrian Hunter. Define new structure for dwcmshc platform data/ops. In addition, I organized the code and classified the helper functions. Since the file changes were relatively large (though the functional logic did not change much), I split the original patch into four for the convenience of review. Changes in v2: Rebased on latest 'next' branch of [mmc-git]. You can simply review or test the patches at the link [2]. Changes in v1: The patch series is based on v6.9-rc1. You can simply review or test the patches at the link [1]. Link: git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc.git [mmc-git] Link: https://lore.kernel.org/linux-mmc/cover.1713257181.git.unicorn_wang@outlook.com/ [1] Link: https://lore.kernel.org/linux-mmc/cover.1714270290.git.unicorn_wang@outlook.com/ [2] Link: https://lore.kernel.org/linux-mmc/cover.1718241495.git.unicorn_wang@outlook.com/ [3] Link: https://lore.kernel.org/linux-mmc/cover.1718697954.git.unicorn_wang@outlook.com/ [4] Link: https://lore.kernel.org/linux-mmc/cover.1721377374.git.unicorn_wang@outlook.com/ [5] --- Chen Wang (8): mmc: sdhci-of-dwcmshc: add common bulk optional clocks support mmc: sdhci-of-dwcmshc: move two rk35xx functions mmc: sdhci-of-dwcmshc: factor out code for th1520_init() mmc: sdhci-of-dwcmshc: factor out code into dwcmshc_rk35xx_init mmc: sdhci-of-dwcmshc: add dwcmshc_pltfm_data dt-bindings: mmc: sdhci-of-dwcmhsc: Add Sophgo SG2042 support mmc: sdhci-of-dwcmshc: Add support for Sophgo SG2042 riscv: sophgo: dts: add mmc controllers for SG2042 SoC .../bindings/mmc/snps,dwcmshc-sdhci.yaml | 60 ++- .../boot/dts/sophgo/sg2042-milkv-pioneer.dts | 17 + arch/riscv/boot/dts/sophgo/sg2042.dtsi | 28 ++ drivers/mmc/host/sdhci-of-dwcmshc.c | 451 ++++++++++++------ 4 files changed, 383 insertions(+), 173 deletions(-) base-commit: 538076ce6b8dfe5e8e8d9d250298030f165d8457