From patchwork Tue Jun 21 14:41:48 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shawn Guo X-Patchwork-Id: 2125 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 3FFED23DE6 for ; Tue, 21 Jun 2011 14:32:44 +0000 (UTC) Received: from mail-vw0-f52.google.com (mail-vw0-f52.google.com [209.85.212.52]) by fiordland.canonical.com (Postfix) with ESMTP id 0EA05A18406 for ; Tue, 21 Jun 2011 14:32:43 +0000 (UTC) Received: by vws16 with SMTP id 16so4746427vws.11 for ; Tue, 21 Jun 2011 07:32:43 -0700 (PDT) Received: by 10.52.161.65 with SMTP id xq1mr1580769vdb.167.1308666763382; Tue, 21 Jun 2011 07:32:43 -0700 (PDT) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.52.183.130 with SMTP id em2cs71537vdc; Tue, 21 Jun 2011 07:32:43 -0700 (PDT) Received: by 10.100.87.4 with SMTP id k4mr7081994anb.67.1308666762568; Tue, 21 Jun 2011 07:32:42 -0700 (PDT) Received: from mail-iw0-f178.google.com (mail-iw0-f178.google.com [209.85.214.178]) by mx.google.com with ESMTPS id i4si21896043icn.31.2011.06.21.07.32.42 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 21 Jun 2011 07:32:42 -0700 (PDT) Received-SPF: neutral (google.com: 209.85.214.178 is neither permitted nor denied by best guess record for domain of shawn.guo@linaro.org) client-ip=209.85.214.178; Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.214.178 is neither permitted nor denied by best guess record for domain of shawn.guo@linaro.org) smtp.mail=shawn.guo@linaro.org Received: by iwc10 with SMTP id 10so958485iwc.37 for ; Tue, 21 Jun 2011 07:32:42 -0700 (PDT) Received: by 10.42.197.3 with SMTP id ei3mr7483300icb.78.1308666762134; Tue, 21 Jun 2011 07:32:42 -0700 (PDT) Received: from localhost.localdomain ([58.208.99.112]) by mx.google.com with ESMTPS id vn4sm6819433icb.19.2011.06.21.07.32.30 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 21 Jun 2011 07:32:41 -0700 (PDT) From: Shawn Guo To: linux-mmc@vger.kernel.org Cc: Chris Ball , Wolfram Sang , Arnaud Patard , Eric Benard , Philip Rakity , linux-arm-kernel@lists.infradead.org, patches@linaro.org, Shawn Guo Subject: [PATCH v4 1/4] mmc: sdhci: fix interrupt storm from card detection Date: Tue, 21 Jun 2011 22:41:48 +0800 Message-Id: <1308667311-1855-2-git-send-email-shawn.guo@linaro.org> X-Mailer: git-send-email 1.7.4.1 In-Reply-To: <1308667311-1855-1-git-send-email-shawn.guo@linaro.org> References: <1308667311-1855-1-git-send-email-shawn.guo@linaro.org> The issue was initially found by Eric Benard as below. http://permalink.gmane.org/gmane.linux.ports.arm.kernel/108031 Not sure about other SDHCI based controller, but on Freescale eSDHC, the SDHCI_INT_CARD_INSERT bits will be immediately set again when it gets cleared, if a card is inserted. The driver need to mask the irq to prevent interrupt storm which will freeze the system. And the SDHCI_INT_CARD_REMOVE gets the same situation. The patch fixes the problem based on the initial idea from Eric Benard. Signed-off-by: Shawn Guo Cc: Eric Benard Tested-by: Arnaud Patard Reviewed-by: Philip Rakity --- drivers/mmc/host/sdhci.c | 29 +++++++++++++++++++++++++---- 1 files changed, 25 insertions(+), 4 deletions(-) diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index 91d9892..790f959 100644 --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c @@ -127,11 +127,15 @@ static void sdhci_mask_irqs(struct sdhci_host *host, u32 irqs) static void sdhci_set_card_detection(struct sdhci_host *host, bool enable) { - u32 irqs = SDHCI_INT_CARD_REMOVE | SDHCI_INT_CARD_INSERT; + u32 present, irqs; if (host->quirks & SDHCI_QUIRK_BROKEN_CARD_DETECTION) return; + present = sdhci_readl(host, SDHCI_PRESENT_STATE) & + SDHCI_CARD_PRESENT; + irqs = present ? SDHCI_INT_CARD_REMOVE : SDHCI_INT_CARD_INSERT; + if (enable) sdhci_unmask_irqs(host, irqs); else @@ -2154,13 +2158,30 @@ static irqreturn_t sdhci_irq(int irq, void *dev_id) mmc_hostname(host->mmc), intmask); if (intmask & (SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE)) { + u32 present = sdhci_readl(host, SDHCI_PRESENT_STATE) & + SDHCI_CARD_PRESENT; + + /* + * There is a observation on i.mx esdhc. INSERT bit will be + * immediately set again when it gets cleared, if a card is + * inserted. We have to mask the irq to prevent interrupt + * storm which will freeze the system. And the REMOVE gets + * the same situation. + * + * More testing are needed here to ensure it works for other + * platforms though. + */ + sdhci_mask_irqs(host, present ? SDHCI_INT_CARD_INSERT : + SDHCI_INT_CARD_REMOVE); + sdhci_unmask_irqs(host, present ? SDHCI_INT_CARD_REMOVE : + SDHCI_INT_CARD_INSERT); + sdhci_writel(host, intmask & (SDHCI_INT_CARD_INSERT | - SDHCI_INT_CARD_REMOVE), SDHCI_INT_STATUS); + SDHCI_INT_CARD_REMOVE), SDHCI_INT_STATUS); + intmask &= ~(SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE); tasklet_schedule(&host->card_tasklet); } - intmask &= ~(SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE); - if (intmask & SDHCI_INT_CMD_MASK) { sdhci_writel(host, intmask & SDHCI_INT_CMD_MASK, SDHCI_INT_STATUS);