From patchwork Wed Dec 12 15:50:21 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 13513 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id C2A2523FCD for ; Wed, 12 Dec 2012 15:50:41 +0000 (UTC) Received: from mail-ie0-f178.google.com (mail-ie0-f178.google.com [209.85.223.178]) by fiordland.canonical.com (Postfix) with ESMTP id 26A98A19B10 for ; Wed, 12 Dec 2012 15:50:41 +0000 (UTC) Received: by mail-ie0-f178.google.com with SMTP id c12so2060246ieb.9 for ; Wed, 12 Dec 2012 07:50:40 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-forwarded-to:x-forwarded-for:delivered-to:received-spf:from:to:cc :subject:date:message-id:x-mailer:mime-version:content-type :x-gm-message-state; bh=UpOKOjIekwqVI/A5XK91UPaZW/H4JvAL2eZXgL8pJVc=; b=h/N2wOMon6YJvUZRzKc58D2ol8AUHUwRoZClFVnUlD2C6i0KyuMcv6yrOOA7nEttt8 VgKmVyjCkivGMwPrzUa0UKXjlAd36T/GgueuO1QRI+6tl65mRwriJOX1QM5iebHHNUXd iyC8kkBsg8j3zXFKYU5OA1x/ekwOAhMmiPDuMBmIG+ybVAY0pVbN84APJgIym7htPe1a BE7lYTXlgtsZSWJw1H87JXvB7VwRah6zGox7o0/gb7W15DsGe+LsC9x3Skwi6UIBZfKP g3sOyIbVKlYH4UBf9ThfxQwxFucPHViEDN1TtkhOu93dWCwZ1ztjxencInAW5/75V1kW hrbg== Received: by 10.50.185.166 with SMTP id fd6mr13518887igc.62.1355327440396; Wed, 12 Dec 2012 07:50:40 -0800 (PST) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.50.67.148 with SMTP id n20csp207733igt; Wed, 12 Dec 2012 07:50:39 -0800 (PST) Received: by 10.14.203.8 with SMTP id e8mr3818897eeo.2.1355327438711; Wed, 12 Dec 2012 07:50:38 -0800 (PST) Received: from eu1sys200aog115.obsmtp.com (eu1sys200aog115.obsmtp.com [207.126.144.139]) by mx.google.com with SMTP id j49si64237189eep.9.2012.12.12.07.50.33 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 12 Dec 2012 07:50:38 -0800 (PST) Received-SPF: neutral (google.com: 207.126.144.139 is neither permitted nor denied by best guess record for domain of ulf.hansson@stericsson.com) client-ip=207.126.144.139; Authentication-Results: mx.google.com; spf=neutral (google.com: 207.126.144.139 is neither permitted nor denied by best guess record for domain of ulf.hansson@stericsson.com) smtp.mail=ulf.hansson@stericsson.com Received: from beta.dmz-eu.st.com ([164.129.1.35]) (using TLSv1) by eu1sys200aob115.postini.com ([207.126.147.11]) with SMTP ID DSNKUMinxvcatukGVo3NUvrni5OC79ep68H7@postini.com; Wed, 12 Dec 2012 15:50:38 UTC Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 9FD0868; Wed, 12 Dec 2012 15:50:24 +0000 (GMT) Received: from relay2.stm.gmessaging.net (unknown [10.230.100.18]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 1BF454DE7; Wed, 12 Dec 2012 15:50:24 +0000 (GMT) Received: from exdcvycastm004.EQ1STM.local (alteon-source-exch [10.230.100.61]) (using TLSv1 with cipher RC4-MD5 (128/128 bits)) (Client CN "exdcvycastm004", Issuer "exdcvycastm004" (not verified)) by relay2.stm.gmessaging.net (Postfix) with ESMTPS id A3EBAA8065; Wed, 12 Dec 2012 16:50:17 +0100 (CET) Received: from steludxu1397.lud.stericsson.com (10.230.100.153) by smtp.stericsson.com (10.230.100.2) with Microsoft SMTP Server (TLS) id 8.3.83.0; Wed, 12 Dec 2012 16:50:23 +0100 From: Ulf Hansson To: , Chris Ball Cc: , Russell King , Linus Walleij , Johan Rudholm , Ulf Hansson Subject: [PATCH] mmc: mmci: Gate the clock when freq is 0 Date: Wed, 12 Dec 2012 16:50:21 +0100 Message-ID: <1355327421-20187-1-git-send-email-ulf.hansson@stericsson.com> X-Mailer: git-send-email 1.7.10 MIME-Version: 1.0 X-Gm-Message-State: ALoCoQk7x63AEqvox34+9oHD9CH8PMR2mX1gutOHN8PT141oIWmgG7WaZ1UGz1VIWY6ua7pFHJIh From: Johan Rudholm In the ST Micro variant, the MMCI_CLOCK register should not be used to gate the clock. Use MMCI_POWER to do this. Signed-off-by: Johan Rudholm Signed-off-by: Ulf Hansson --- drivers/mmc/host/mmci.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c index edc3e9b..bf07823 100644 --- a/drivers/mmc/host/mmci.c +++ b/drivers/mmc/host/mmci.c @@ -1147,6 +1147,15 @@ static void mmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) } } + /* + * If clock = 0 and the block needs a certain value in the clreg + * to function, we need to gate the clock by removing MCI_PWR_ON. + * This is a special case for ST Micro variants, since the power + * register in the ARM legacy case is used for powering the cards. + */ + if (!ios->clock && variant->clkreg) + pwr &= ~MCI_PWR_ON; + spin_lock_irqsave(&host->lock, flags); mmci_set_clkreg(host, ios->clock);