From patchwork Mon Jan 7 16:23:00 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 13893 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 04BB223E2D for ; Mon, 7 Jan 2013 16:23:33 +0000 (UTC) Received: from mail-vb0-f53.google.com (mail-vb0-f53.google.com [209.85.212.53]) by fiordland.canonical.com (Postfix) with ESMTP id 32056A18432 for ; Mon, 7 Jan 2013 16:23:32 +0000 (UTC) Received: by mail-vb0-f53.google.com with SMTP id b23so19337259vbz.40 for ; Mon, 07 Jan 2013 08:23:31 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-received:x-forwarded-to:x-forwarded-for:delivered-to:x-received :received-spf:from:to:cc:subject:date:message-id:x-mailer :mime-version:content-type:x-gm-message-state; bh=m7RCJpSGLChSV/+0FPJLyd52V7iCsco47xV62fRiaAc=; b=J9iXXAkbzfQJHXHtQRa1/U99+UZvDhEn88mcqHsfNcO2jPC3QnfVEf/gdg/dkBZxgN k/CIgYJRywDZD6hq23gpShR9Kpj3Hnojsf5ojwePQoDqDo6qmeyhOLi2wohDchtG+Kwg a69dHpZo78pKNU+sPDwmMatakFayDmDFlvc4BxvVko+Eu4SIAsghBnxw8XBUdcMTglhb 9V9pKykWTUpFu5gWng3dpej5F5ouIyk9UTg0OQ320WvX7aE+Ah5hooNSRrskgNBQ/aeV r0q9J9l2Y+/5isk78sRU81vJjAew0v6THB8h7r+keWqw+oW/PVlW13iGbrZkPtBAFirH v80Q== X-Received: by 10.52.88.168 with SMTP id bh8mr71249131vdb.51.1357575811695; Mon, 07 Jan 2013 08:23:31 -0800 (PST) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.58.145.101 with SMTP id st5csp68659veb; Mon, 7 Jan 2013 08:23:30 -0800 (PST) X-Received: by 10.14.221.5 with SMTP id q5mr165979525eep.33.1357575809946; Mon, 07 Jan 2013 08:23:29 -0800 (PST) Received: from eu1sys200aog102.obsmtp.com (eu1sys200aog102.obsmtp.com [207.126.144.113]) by mx.google.com with SMTP id q6si157973456eep.24.2013.01.07.08.23.24 (version=TLSv1/SSLv3 cipher=OTHER); Mon, 07 Jan 2013 08:23:29 -0800 (PST) Received-SPF: neutral (google.com: 207.126.144.113 is neither permitted nor denied by best guess record for domain of ulf.hansson@stericsson.com) client-ip=207.126.144.113; Authentication-Results: mx.google.com; spf=neutral (google.com: 207.126.144.113 is neither permitted nor denied by best guess record for domain of ulf.hansson@stericsson.com) smtp.mail=ulf.hansson@stericsson.com Received: from beta.dmz-eu.st.com ([164.129.1.35]) (using TLSv1) by eu1sys200aob102.postini.com ([207.126.147.11]) with SMTP ID DSNKUOr2eFDSDGi63fSmdFxRhGR9l/YlaVDG@postini.com; Mon, 07 Jan 2013 16:23:29 UTC Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id EC1B4138; Mon, 7 Jan 2013 16:23:08 +0000 (GMT) Received: from relay1.stm.gmessaging.net (unknown [10.230.100.17]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 5236E4C60; Mon, 7 Jan 2013 16:23:08 +0000 (GMT) Received: from exdcvycastm022.EQ1STM.local (alteon-source-exch [10.230.100.61]) (using TLSv1 with cipher RC4-MD5 (128/128 bits)) (Client CN "exdcvycastm022", Issuer "exdcvycastm022" (not verified)) by relay1.stm.gmessaging.net (Postfix) with ESMTPS id D822324C2F6; Mon, 7 Jan 2013 17:22:59 +0100 (CET) Received: from steludxu1397.lud.stericsson.com (10.230.100.153) by smtp.stericsson.com (10.230.100.30) with Microsoft SMTP Server (TLS) id 8.3.83.0; Mon, 7 Jan 2013 17:23:06 +0100 From: Ulf Hansson To: , Chris Ball Cc: , Russell King , Linus Walleij , Johan Rudholm , Ulf Hansson Subject: [PATCH] mmc: mmci: Fixup clock gating when freq is 0 for ST-variants Date: Mon, 7 Jan 2013 17:23:00 +0100 Message-ID: <1357575780-9075-1-git-send-email-ulf.hansson@stericsson.com> X-Mailer: git-send-email 1.7.10 MIME-Version: 1.0 X-Gm-Message-State: ALoCoQmdaMOJmEq0jlSqUEaL0IDpRaGfFj1d01gy9evV+Q5CNhl91FoSPWo4YkCpUOZ3Z2wYdBQ/ From: Johan Rudholm In the ST Micro variant, the MMCICLOCK register must not be used to gate the clock. Instead use MMCIPOWER register and by clearing the PWR_ON bit to do this. Signed-off-by: Johan Rudholm Signed-off-by: Ulf Hansson --- This patch is affecting the ux500 variants only. It is uncertain whether this new variant data for gating the clock should be enabled for the nomadik and u300 variant as well. We should sort that out before merging with this patch. --- drivers/mmc/host/mmci.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c index 1507723..e3b191f 100644 --- a/drivers/mmc/host/mmci.c +++ b/drivers/mmc/host/mmci.c @@ -59,6 +59,7 @@ static unsigned int fmax = 515633; * @blksz_datactrl16: true if Block size is at b16..b30 position in datactrl register * @pwrreg_powerup: power up value for MMCIPOWER register * @signal_direction: input/out direction of bus signals can be indicated + * @pwrreg_clkgate: MMCIPOWER register must be used to gate the clock */ struct variant_data { unsigned int clkreg; @@ -71,6 +72,7 @@ struct variant_data { bool blksz_datactrl16; u32 pwrreg_powerup; bool signal_direction; + bool pwrreg_clkgate; }; static struct variant_data variant_arm = { @@ -118,6 +120,7 @@ static struct variant_data variant_ux500 = { .st_clkdiv = true, .pwrreg_powerup = MCI_PWR_ON, .signal_direction = true, + .pwrreg_clkgate = true, }; static struct variant_data variant_ux500v2 = { @@ -131,6 +134,7 @@ static struct variant_data variant_ux500v2 = { .blksz_datactrl16 = true, .pwrreg_powerup = MCI_PWR_ON, .signal_direction = true, + .pwrreg_clkgate = true, }; /* @@ -1154,6 +1158,13 @@ static void mmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) } } + /* + * If clock = 0 and the variant requires the MMCIPOWER to be used for + * gating the clock, the MCI_PWR_ON bit is cleared. + */ + if (!ios->clock && variant->pwrreg_clkgate) + pwr &= ~MCI_PWR_ON; + spin_lock_irqsave(&host->lock, flags); mmci_set_clkreg(host, ios->clock);