From patchwork Fri May 23 12:52:36 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srinivas Kandagatla X-Patchwork-Id: 30771 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-ob0-f198.google.com (mail-ob0-f198.google.com [209.85.214.198]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id 3F4222066E for ; Fri, 23 May 2014 12:52:48 +0000 (UTC) Received: by mail-ob0-f198.google.com with SMTP id va2sf21953860obc.1 for ; Fri, 23 May 2014 05:52:47 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:delivered-to:from:to:cc:subject :date:message-id:in-reply-to:references:sender:precedence:list-id :x-original-sender:x-original-authentication-results:mailing-list :list-post:list-help:list-archive:list-unsubscribe; bh=/LtyTAzKF3QU7zdVutDzZu/aZzWw4aEQqX1EqCuIHmE=; b=J8LHM0zKxIFZ5NB0RXziiiDSJgnBVBxodGiaSacxdJX36zh8q6M/cLvOP8DKD+OmXj /t1T4OGj80/eTx7OYF3jkZxDmk+OaTnUD430NNumm2mTKw8qFmP64UfCIGfhq/gY/3Y2 TAMPugM/yjiRQWXcBqCLWnc5uqs69YjHwKfKfWhQTI+7Ttd+uZl9m4UaiT4AYmT4VvG3 IeoppDpgJruT3iv8pFzSzrcHRBnOeqkj4Aqwrc8gGrA8RkWNNAu4xeQzvYZu9AWmsZof iCIVl7jFGQ+g8iKltVsQoLRzPiXE6gsxIfeHkZQetsS/GMmzLmN8J9yx+rBCKC/sWAFC AuXA== X-Gm-Message-State: ALoCoQnMopGjP0JNYUNWyJx8L8HT36G/JeD4gU56hyOFtHevrJKL3xa+rUEB/AVRXlbCUpilKuLD X-Received: by 10.182.19.231 with SMTP id i7mr2024720obe.25.1400849567814; Fri, 23 May 2014 05:52:47 -0700 (PDT) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.140.97.99 with SMTP id l90ls1849760qge.13.gmail; Fri, 23 May 2014 05:52:47 -0700 (PDT) X-Received: by 10.220.160.67 with SMTP id m3mr203208vcx.56.1400849567687; Fri, 23 May 2014 05:52:47 -0700 (PDT) Received: from mail-vc0-f170.google.com (mail-vc0-f170.google.com [209.85.220.170]) by mx.google.com with ESMTPS id jv10si1537246veb.79.2014.05.23.05.52.47 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 23 May 2014 05:52:47 -0700 (PDT) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.220.170 as permitted sender) client-ip=209.85.220.170; Received: by mail-vc0-f170.google.com with SMTP id lf12so6204702vcb.1 for ; Fri, 23 May 2014 05:52:47 -0700 (PDT) X-Received: by 10.52.93.201 with SMTP id cw9mr159634vdb.80.1400849567603; Fri, 23 May 2014 05:52:47 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.220.221.72 with SMTP id ib8csp29036vcb; Fri, 23 May 2014 05:52:47 -0700 (PDT) X-Received: by 10.69.20.10 with SMTP id gy10mr5740700pbd.162.1400849566687; Fri, 23 May 2014 05:52:46 -0700 (PDT) Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id cc3si3830195pad.47.2014.05.23.05.52.46 for ; Fri, 23 May 2014 05:52:46 -0700 (PDT) Received-SPF: none (google.com: linux-kernel-owner@vger.kernel.org does not designate permitted sender hosts) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752957AbaEWMwn (ORCPT + 27 others); Fri, 23 May 2014 08:52:43 -0400 Received: from mail-wg0-f46.google.com ([74.125.82.46]:61277 "EHLO mail-wg0-f46.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752895AbaEWMwl (ORCPT ); Fri, 23 May 2014 08:52:41 -0400 Received: by mail-wg0-f46.google.com with SMTP id n12so4797712wgh.29 for ; Fri, 23 May 2014 05:52:39 -0700 (PDT) X-Received: by 10.180.106.1 with SMTP id gq1mr3068386wib.45.1400849559917; Fri, 23 May 2014 05:52:39 -0700 (PDT) Received: from srini-ThinkPad-X1-Carbon-2nd.dlink.com (host-78-149-4-211.as13285.net. [78.149.4.211]) by mx.google.com with ESMTPSA id f6sm2797890wiy.19.2014.05.23.05.52.38 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 23 May 2014 05:52:39 -0700 (PDT) From: srinivas.kandagatla@linaro.org To: Russell King , Ulf Hansson , linux-mmc@vger.kernel.org Cc: Chris Ball , linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linus.walleij@linaro.org, Srinivas Kandagatla Subject: [PATCH v3 10/13] mmc: mmci: add Qcom specifics of clk and datactrl registers. Date: Fri, 23 May 2014 13:52:36 +0100 Message-Id: <1400849556-7501-1-git-send-email-srinivas.kandagatla@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1400849362-7007-1-git-send-email-srinivas.kandagatla@linaro.org> References: <1400849362-7007-1-git-send-email-srinivas.kandagatla@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: srinivas.kandagatla@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.220.170 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , From: Srinivas Kandagatla This patch adds specifics of clk and datactrl register on Qualcomm SD Card controller. This patch also populates the Qcom variant data with these new values specific to Qualcomm SD Card Controller. Signed-off-by: Srinivas Kandagatla Reviewed-by: Linus Walleij --- drivers/mmc/host/mmci.c | 4 ++++ drivers/mmc/host/mmci.h | 24 ++++++++++++++++++++++++ 2 files changed, 28 insertions(+) diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c index 17e7f6a..6434f5b1 100644 --- a/drivers/mmc/host/mmci.c +++ b/drivers/mmc/host/mmci.c @@ -185,6 +185,10 @@ static struct variant_data variant_qcom = { .fifosize = 16 * 4, .fifohalfsize = 8 * 4, .clkreg = MCI_CLK_ENABLE, + .clkreg_enable = MCI_QCOM_CLK_FLOWENA | + MCI_QCOM_CLK_FEEDBACK_CLK, + .clkreg_8bit_bus_enable = MCI_QCOM_CLK_WIDEBUS_8, + .datactrl_mask_ddrmode = MCI_QCOM_CLK_DDR_MODE, .blksz_datactrl4 = true, .datalength_bits = 24, .blksz_datactrl4 = true, diff --git a/drivers/mmc/host/mmci.h b/drivers/mmc/host/mmci.h index cd83ca3..1b93ae7 100644 --- a/drivers/mmc/host/mmci.h +++ b/drivers/mmc/host/mmci.h @@ -41,6 +41,22 @@ /* Modified PL180 on Versatile Express platform */ #define MCI_ARM_HWFCEN BIT(12) +/* Modified on Qualcomm Integrations */ +#define MCI_QCOM_CLK_WIDEBUS_4 (2 << 10) +#define MCI_QCOM_CLK_WIDEBUS_8 (3 << 10) +#define MCI_QCOM_CLK_FLOWENA BIT(12) +#define MCI_QCOM_CLK_INVERTOUT BIT(13) + +/* select in latch data and command */ +#define MCI_QCOM_CLK_SEL_IN_SHIFT (14) +#define MCI_QCOM_CLK_SEL_MASK (0x3) +#define MCI_QCOM_CLK_SEL_RISING_EDGE (1) +#define MCI_QCOM_CLK_FEEDBACK_CLK (2 << 14) +#define MCI_QCOM_CLK_DDR_MODE (3 << 14) + +/* mclk selection */ +#define MCI_QCOM_CLK_SEL_MCLK (2 << 23) + #define MMCIARGUMENT 0x008 #define MMCICOMMAND 0x00c #define MCI_CPSM_RESPONSE BIT(6) @@ -54,6 +70,14 @@ #define MCI_ST_NIEN BIT(13) #define MCI_ST_CE_ATACMD BIT(14) +/* Modified on Qualcomm Integrations */ +#define MCI_QCOM_CSPM_DATCMD BIT(12) +#define MCI_QCOM_CSPM_MCIABORT BIT(13) +#define MCI_QCOM_CSPM_CCSENABLE BIT(14) +#define MCI_QCOM_CSPM_CCSDISABLE BIT(15) +#define MCI_QCOM_CSPM_AUTO_CMD19 BIT(16) +#define MCI_QCOM_CSPM_AUTO_CMD21 BIT(21) + #define MMCIRESPCMD 0x010 #define MMCIRESPONSE0 0x014 #define MMCIRESPONSE1 0x018