From patchwork Tue Aug 12 12:05:02 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srinivas Kandagatla X-Patchwork-Id: 35253 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-oi0-f70.google.com (mail-oi0-f70.google.com [209.85.218.70]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id 1E17A20540 for ; Tue, 12 Aug 2014 12:05:23 +0000 (UTC) Received: by mail-oi0-f70.google.com with SMTP id u20sf39084658oif.5 for ; Tue, 12 Aug 2014 05:05:22 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:delivered-to:from:to:cc:subject :date:message-id:in-reply-to:references:sender:precedence:list-id :x-original-sender:x-original-authentication-results:mailing-list :list-post:list-help:list-archive:list-unsubscribe; bh=sBtOgvC6sxyCFeTka1yUiReJDi7tDs5/vxX3pcRQofo=; b=BKXMJrsceGQXaSGhUzfBXf3WBg94tfQYenJnUOYwbGz+j5f9Zb/4TT74tbnaTDyr3l In6K8kVLvCWkLIw3a3CQGTy3rQq03J+lyQrmC00oaU6Rixh6ubRjai4VedbJj+ronVUq wiQV0TUMETMPiH0g08o34yWBbX8XKmDv3brgjjXLjei5+jZmeXCPjuDxj4HjloN9q2si mMwinLp2ty7haefgzyeS5OL099cl7MJEtzuCm8eAu9aQuYDqG/W4V2kd/w+WevsqZbcZ Q+oj4oVLBjFZJtI6IyDbTrguneH/hTAqF3YVC9EyYv1VwoHu5rNJ80hCctqdJWHX8Aye Bylg== X-Gm-Message-State: ALoCoQlmG8XxoH2d+cl47VpLAkZ2M/xnBbXzgmzbpN+KeOoCrbhUHmotNaLENDUT+lCo02Xi69VN X-Received: by 10.182.29.65 with SMTP id i1mr2017039obh.30.1407845122743; Tue, 12 Aug 2014 05:05:22 -0700 (PDT) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.140.92.102 with SMTP id a93ls66874qge.15.gmail; Tue, 12 Aug 2014 05:05:22 -0700 (PDT) X-Received: by 10.53.9.133 with SMTP id ds5mr96816vdd.66.1407845122621; Tue, 12 Aug 2014 05:05:22 -0700 (PDT) Received: from mail-vc0-f179.google.com (mail-vc0-f179.google.com [209.85.220.179]) by mx.google.com with ESMTPS id e20si8052831vdj.21.2014.08.12.05.05.22 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Tue, 12 Aug 2014 05:05:22 -0700 (PDT) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.220.179 as permitted sender) client-ip=209.85.220.179; Received: by mail-vc0-f179.google.com with SMTP id hq11so13184606vcb.10 for ; Tue, 12 Aug 2014 05:05:22 -0700 (PDT) X-Received: by 10.52.164.199 with SMTP id ys7mr9583422vdb.42.1407845122294; Tue, 12 Aug 2014 05:05:22 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.221.37.5 with SMTP id tc5csp242691vcb; Tue, 12 Aug 2014 05:05:21 -0700 (PDT) X-Received: by 10.70.36.239 with SMTP id t15mr3879595pdj.83.1407845121241; Tue, 12 Aug 2014 05:05:21 -0700 (PDT) Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id oz7si12313815pdb.214.2014.08.12.05.05.20 for ; Tue, 12 Aug 2014 05:05:21 -0700 (PDT) Received-SPF: none (google.com: linux-kernel-owner@vger.kernel.org does not designate permitted sender hosts) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752928AbaHLMFR (ORCPT + 26 others); Tue, 12 Aug 2014 08:05:17 -0400 Received: from mail-pa0-f45.google.com ([209.85.220.45]:39113 "EHLO mail-pa0-f45.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752287AbaHLMFO (ORCPT ); Tue, 12 Aug 2014 08:05:14 -0400 Received: by mail-pa0-f45.google.com with SMTP id eu11so12940869pac.32 for ; Tue, 12 Aug 2014 05:05:14 -0700 (PDT) X-Received: by 10.70.0.48 with SMTP id 16mr3910052pdb.8.1407845114064; Tue, 12 Aug 2014 05:05:14 -0700 (PDT) Received: from localhost.localdomain ([117.198.92.185]) by mx.google.com with ESMTPSA id pd1sm13451078pdb.76.2014.08.12.05.05.08 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 12 Aug 2014 05:05:12 -0700 (PDT) From: Srinivas Kandagatla To: linux-mmc@vger.kernel.org Cc: Linus Walleij , Chris Ball , Ulf Hansson , Russell King , linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Srinivas Kandagatla Subject: [PATCH RFC 4/5] mmc: mmci: Add sdio enable mask in variant data Date: Tue, 12 Aug 2014 13:05:02 +0100 Message-Id: <1407845102-8402-1-git-send-email-srinivas.kandadgatla@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1407844950-8072-1-git-send-email-srinivas.kandadgatla@linaro.org> References: <1407844950-8072-1-git-send-email-srinivas.kandadgatla@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: srinivas.kandagatla@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.220.179 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , From: Srinivas Kandagatla This patch adds sdio enable mask in variant data, SOCs like ST have special bits in datactrl register to enable sdio. Unconditionally setting this bit in this driver breaks other SOCs like Qualcomm which maps this bits to something else, so making this enable bit to come from variant data solves the issue. Originally the issue is detected while testing WLAN ath6kl on Qualcomm APQ8064. Signed-off-by: Srinivas Kandagatla Reviewed-by: Linus Walleij --- drivers/mmc/host/mmci.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c index 747aba0..848e2bb 100644 --- a/drivers/mmc/host/mmci.c +++ b/drivers/mmc/host/mmci.c @@ -67,6 +67,7 @@ static unsigned int fmax = 515633; * @blksz_datactrl16: true if Block size is at b16..b30 position in datactrl register * @blksz_datactrl4: true if Block size is at b4..b16 position in datactrl * register + * @datactrl_mask_sdio: SDIO enable mask in datactrl register * @pwrreg_powerup: power up value for MMCIPOWER register * @f_max: maximum clk frequency supported by the controller. * @signal_direction: input/out direction of bus signals can be indicated @@ -87,6 +88,7 @@ struct variant_data { unsigned int fifohalfsize; unsigned int data_cmd_enable; unsigned int datactrl_mask_ddrmode; + unsigned int datactrl_mask_sdio; bool sdio; bool st_clkdiv; bool blksz_datactrl16; @@ -133,6 +135,7 @@ static struct variant_data variant_u300 = { .clkreg_enable = MCI_ST_U300_HWFCEN, .clkreg_8bit_bus_enable = MCI_ST_8BIT_BUS, .datalength_bits = 16, + .datactrl_mask_sdio = MCI_ST_DPSM_SDIOEN, .sdio = true, .pwrreg_powerup = MCI_PWR_ON, .f_max = 100000000, @@ -146,6 +149,7 @@ static struct variant_data variant_nomadik = { .fifohalfsize = 8 * 4, .clkreg = MCI_CLK_ENABLE, .datalength_bits = 24, + .datactrl_mask_sdio = MCI_ST_DPSM_SDIOEN, .sdio = true, .st_clkdiv = true, .pwrreg_powerup = MCI_PWR_ON, @@ -163,6 +167,7 @@ static struct variant_data variant_ux500 = { .clkreg_8bit_bus_enable = MCI_ST_8BIT_BUS, .clkreg_neg_edge_enable = MCI_ST_UX500_NEG_EDGE, .datalength_bits = 24, + .datactrl_mask_sdio = MCI_ST_DPSM_SDIOEN, .sdio = true, .st_clkdiv = true, .pwrreg_powerup = MCI_PWR_ON, @@ -182,6 +187,7 @@ static struct variant_data variant_ux500v2 = { .clkreg_neg_edge_enable = MCI_ST_UX500_NEG_EDGE, .datactrl_mask_ddrmode = MCI_ST_DPSM_DDRMODE, .datalength_bits = 24, + .datactrl_mask_sdio = MCI_ST_DPSM_SDIOEN, .sdio = true, .st_clkdiv = true, .blksz_datactrl16 = true, @@ -811,16 +817,10 @@ static void mmci_start_data(struct mmci_host *host, struct mmc_data *data) if (data->flags & MMC_DATA_READ) datactrl |= MCI_DPSM_DIRECTION; - /* The ST Micro variants has a special bit to enable SDIO */ if (variant->sdio && host->mmc->card) if (mmc_card_sdio(host->mmc->card)) { - /* - * The ST Micro variants has a special bit - * to enable SDIO. - */ u32 clk; - - datactrl |= MCI_ST_DPSM_SDIOEN; + datactrl |= variant->datactrl_mask_sdio; /* * The ST Micro variant for SDIO small write transfers