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[209.132.180.67]) by mx.google.com with ESMTP id pn6si31328834pdb.15.2015.05.14.01.45.47; Thu, 14 May 2015 01:45:49 -0700 (PDT) Received-SPF: none (google.com: devicetree-owner@vger.kernel.org does not designate permitted sender hosts) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932443AbbENIpq (ORCPT + 7 others); Thu, 14 May 2015 04:45:46 -0400 Received: from mail-pd0-f174.google.com ([209.85.192.174]:34504 "EHLO mail-pd0-f174.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753071AbbENIpp (ORCPT ); Thu, 14 May 2015 04:45:45 -0400 Received: by pdbqa5 with SMTP id qa5so79364470pdb.1 for ; Thu, 14 May 2015 01:45:44 -0700 (PDT) X-Received: by 10.70.36.139 with SMTP id q11mr6179392pdj.38.1431593144400; Thu, 14 May 2015 01:45:44 -0700 (PDT) Received: from localhost.localdomain ([180.150.148.224]) by mx.google.com with ESMTPSA id dk5sm21625161pdb.88.2015.05.14.01.45.39 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 14 May 2015 01:45:43 -0700 (PDT) From: Zhangfei Gao To: Jaehoon Chung , ulf.hansson@linaro.org Cc: linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, Zhangfei Gao Subject: [PATCH v3 1/3] Document: dw_mmc-k3: add document of hi6220 mmc Date: Thu, 14 May 2015 16:45:17 +0800 Message-Id: <1431593119-31889-2-git-send-email-zhangfei.gao@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1431593119-31889-1-git-send-email-zhangfei.gao@linaro.org> References: <1431593119-31889-1-git-send-email-zhangfei.gao@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: devicetree@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: zhangfei.gao@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.51 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Add bindings for hi6220 mmc support Signed-off-by: Zhangfei Gao --- .../devicetree/bindings/mmc/k3-dw-mshc.txt | 28 ++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt b/Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt index 3b35449..df37058 100644 --- a/Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt +++ b/Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt @@ -13,6 +13,10 @@ Required Properties: * compatible: should be one of the following. - "hisilicon,hi4511-dw-mshc": for controllers with hi4511 specific extensions. + - "hisilicon,hi6220-dw-mshc": for controllers with hi6220 specific extensions. + +Optional Properties: +- hisilicon,peripheral-syscon: phandle of syscon used to control peripheral. Example: @@ -42,3 +46,27 @@ Example: cap-mmc-highspeed; cap-sd-highspeed; }; + + /* for Hi6220 */ + + dwmmc_1: dwmmc1@f723e000 { + compatible = "hisilicon,hi6220-dw-mshc"; + num-slots = <0x1>; + bus-width = <0x4>; + disable-wp; + cap-sd-highspeed; + sd-uhs-sdr12; + sd-uhs-sdr25; + card-detect-delay = <200>; + hisilicon,peripheral-syscon = <&ao_ctrl>; + reg = <0x0 0xf723e000 0x0 0x1000>; + interrupts = <0x0 0x49 0x4>; + clocks = <&clock_sys HI6220_MMC1_CIUCLK>, <&clock_sys HI6220_MMC1_CLK>; + clock-names = "ciu", "biu"; + cd-gpios = <&gpio1 0 1>; + pinctrl-names = "default", "idle"; + pinctrl-0 = <&sd_pmx_func &sd_clk_cfg_func &sd_cfg_func>; + pinctrl-1 = <&sd_pmx_idle &sd_clk_cfg_idle &sd_cfg_idle>; + vqmmc-supply = <&ldo7>; + vmmc-supply = <&ldo10>; + };