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[209.132.180.67]) by mx.google.com with ESMTP id fb11si9113896pac.234.2016.10.27.19.37.35; Thu, 27 Oct 2016 19:37:35 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-mmc-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org; spf=pass (google.com: best guess record for domain of linux-mmc-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-mmc-owner@vger.kernel.org; dmarc=fail (p=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1034433AbcJ1Che (ORCPT + 3 others); Thu, 27 Oct 2016 22:37:34 -0400 Received: from mail-pf0-f177.google.com ([209.85.192.177]:36274 "EHLO mail-pf0-f177.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1034365AbcJ1Chd (ORCPT ); Thu, 27 Oct 2016 22:37:33 -0400 Received: by mail-pf0-f177.google.com with SMTP id e6so28221440pfk.3 for ; Thu, 27 Oct 2016 19:37:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=VqQHwEF/ZkH78lHxyu2d9jq1DWifOpyD24Oa+a8ekLA=; b=cLl4k5+SW0JTHiXUgdHDdKTaT+LWbs4aUV13e3RtLMCYLEZrSLXf8sqFvnHz9kQ++J dqsd+tpOCgIUjYuRR0U0+VaaAElIYxaMlY5qGKDDEHo+Ism0LmlcZqmktSFIK40HdFKf PX4LX/EodOWyreKM/V2Dpa96XUaZmF5t+w0hQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=VqQHwEF/ZkH78lHxyu2d9jq1DWifOpyD24Oa+a8ekLA=; b=hx/VaACesXDE4/WC8yddbRlY+AONWgl26NVN1Wiu1mUohmygwM74g3z4R62/MDfif+ h2KHg9Rk9s1DarvkdCEBRmQLrTNHPqRcFxR7COQLNzoerxBdBu1TYvzfG4KsagHpAGmU AYCgedKrbIqZ/o+8NgO8kdbYye0Pin/8LDGaM+Dachsmnt5DaJ+ZHDZWKwJ1D6orisqn xhc2mIWOXlKSQhKDeT8DnP/uNqSvOQolNTz2EJWS3PpurLYpTyN1D/jlw9JLbwMebje1 MuZoFyq+00p+tlmbn+VXqqZ+ihqhTwyOVLpGHY6ozawHXk4J/eZ+wP7RnKnm5dDgbKbL YY2w== X-Gm-Message-State: ABUngvdIZ7SSMxqLsonY4X7Vnyu0jhz8JFZPVnMOd44mYP8vf09RaLAK0pby01yULIfGGu6h X-Received: by 10.99.167.75 with SMTP id w11mr16919933pgo.16.1477622252945; Thu, 27 Oct 2016 19:37:32 -0700 (PDT) Received: from localhost.localdomain ([188.42.255.212]) by smtp.gmail.com with ESMTPSA id e1sm14636767pap.11.2016.10.27.19.37.29 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 27 Oct 2016 19:37:32 -0700 (PDT) From: Jun Nie To: shawn.guo@linaro.org, xie.baoyou@zte.com.cn Cc: ulf.hansson@linaro.org, jh80.chung@samsung.com, jason.liu@linaro.org, linux-mmc@vger.kernel.org, Jun Nie Subject: [PATCH v2 3/5] Documentation: synopsys-dw-mshc: add binding for fifo quirks Date: Fri, 28 Oct 2016 10:37:07 +0800 Message-Id: <1477622229-32060-4-git-send-email-jun.nie@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1477622229-32060-1-git-send-email-jun.nie@linaro.org> References: <1477622229-32060-1-git-send-email-jun.nie@linaro.org> Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org Add fifo-addr property and fifo-watermark-quirk property to synopsys-dw-mshc bindings. It is intended to provide more dt interface to support SoCs specific configuration. Signed-off-by: Jun Nie --- Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt | 13 +++++++++++++ 1 file changed, 13 insertions(+) -- 1.9.1 -- To unsubscribe from this list: send the line "unsubscribe linux-mmc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt b/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt index 4e00e85..c8182b4 100644 --- a/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt +++ b/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt @@ -76,6 +76,17 @@ Optional properties: * broken-cd: as documented in mmc core bindings. +* fifo-addr: Override fifo address with value provided by DT. The default FIFO reg + offset is assumed as 0x100 (version < 0x240A) and 0x200(version >= 0x240A) by + driver. If the controller does not follow this rule, please use this property + to set fifo address in device tree. + +* fifo-watermark-quirk: Data done irq is expected if data length is less than + watermark in PIO mode. But fifo watermark is requested to be aligned with data + length in some SoC so that TX/RX irq can be generated with data done irq. Add the + watermark quirk to mark this requirement and force fifo watermark setting + accordingly. + * vmmc-supply: The phandle to the regulator to use for vmmc. If this is specified we'll defer probe until we can find this regulator. @@ -103,6 +114,8 @@ board specific portions as listed below. interrupts = <0 75 0>; #address-cells = <1>; #size-cells = <0>; + fifo-addr = <0x200>; + fifo-watermark-quirk; }; [board specific internal DMA resources]