@@ -80,7 +80,6 @@ properties:
- const: iface
- const: core
- const: xo
- - const: ice
- const: bus
- const: cal
- const: sleep
@@ -120,6 +119,10 @@ properties:
$ref: /schemas/types.yaml#/definitions/uint32
description: platform specific settings for DLL_CONFIG reg.
+ qcom,ice:
+ $ref: /schemas/types.yaml#/definitions/phandle
+ description: phandle to the Inline Crypto Engine node
+
iommus:
minItems: 1
maxItems: 8
@@ -180,14 +183,12 @@ allOf:
- description: Host controller register map
- description: SD Core register map
- description: CQE register map
- - description: Inline Crypto Engine register map
reg-names:
minItems: 2
items:
- const: hc
- const: core
- const: cqhci
- - const: ice
else:
properties:
reg:
@@ -195,13 +196,11 @@ allOf:
items:
- description: Host controller register map
- description: CQE register map
- - description: Inline Crypto Engine register map
reg-names:
minItems: 1
items:
- const: hc
- const: cqhci
- - const: ice
unevaluatedProperties: false
The ICE will have its own devicetree node, so drop the ICE core clock and add the qcom,ice property instead. Signed-off-by: Abel Vesa <abel.vesa@linaro.org> --- This patch was not part of the v1. Documentation/devicetree/bindings/mmc/sdhci-msm.yaml | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-)