Message ID | 20230912045157.177966-15-claudiu.beznea.uj@bp.renesas.com |
---|---|
State | New |
Headers | show |
Series | Add new Renesas RZ/G3S SoC and RZ/G3S SMARC EVK | expand |
On Thu, Sep 14, 2023 at 3:29 PM Geert Uytterhoeven <geert@linux-m68k.org> wrote: > On Tue, Sep 12, 2023 at 6:52 AM Claudiu <claudiu.beznea@tuxon.dev> wrote: > > From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> > > > > flag and mux_flags are intended to keep bit masks. Use u32 type for it. > > > > Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> > > Thanks for your patch! > > > --- a/drivers/clk/renesas/rzg2l-cpg.h > > +++ b/drivers/clk/renesas/rzg2l-cpg.h > > @@ -92,8 +92,8 @@ struct cpg_core_clk { > > unsigned int conf; > > const struct clk_div_table *dtable; > > const char * const *parent_names; > > - int flag; > > - int mux_flags; > > + u32 flag; > > "flag" is used for several purposes, which expected different types: > - clk_init_data.flags is unsigned long, > - The clk_divider_flags parameter of clk_hw_register_divider_table() is u8, > - The clk_divider_flags parameter of __clk_hw_register_divider() is u8, > - The flags parameter of __devm_clk_hw_register_mux() is unsigned long. > > > + u32 mux_flags; > > Actually the clk_mux_flags parameter of __devm_clk_hw_register_mux() is u8. > > > int num_parents; > > }; > > I guess u32 is fine for all. > Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Thx, will queue in renesas-clk-for-v6.7. Gr{oetje,eeting}s, Geert
diff --git a/drivers/clk/renesas/rzg2l-cpg.h b/drivers/clk/renesas/rzg2l-cpg.h index 6cee9e56acc7..0b28870a6f9d 100644 --- a/drivers/clk/renesas/rzg2l-cpg.h +++ b/drivers/clk/renesas/rzg2l-cpg.h @@ -92,8 +92,8 @@ struct cpg_core_clk { unsigned int conf; const struct clk_div_table *dtable; const char * const *parent_names; - int flag; - int mux_flags; + u32 flag; + u32 mux_flags; int num_parents; };