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Mon, 1 Jul 2024 08:13:28 -0700 From: Krishna Yarlagadda To: , , , , , CC: , , , , , , , , , , , , , Subject: [RFC PATCH V2 09/12] dt-bindings: misc: tegra-sdhci: config settings Date: Mon, 1 Jul 2024 20:42:27 +0530 Message-ID: <20240701151231.29425-10-kyarlagadda@nvidia.com> X-Mailer: git-send-email 2.43.2 In-Reply-To: <20240701151231.29425-1-kyarlagadda@nvidia.com> References: <20240701151231.29425-1-kyarlagadda@nvidia.com> Precedence: bulk X-Mailing-List: linux-mmc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000EE3E:EE_|BL1PR12MB5898:EE_ X-MS-Office365-Filtering-Correlation-Id: 55cb9556-631a-4ff9-2d32-08dc99e0664e X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|82310400026|1800799024|36860700013|376014|7416014; X-Microsoft-Antispam-Message-Info: +XoaABpTx/We/bH+iVYULkWwf7ZBTEhgTTHtdbCH9JKZ0vRljVf5aGGALFq8kzJJgn7beJHtSgyCL/yxCs8Z/Bpxsf7d/tKowDWXJVbgElDkPt61ROu8/YFQWKEu7Jq7wGBZQZ/IKnGpXNaWbO7GcUZVWs4jzvLmynZlvvAKtwyjSqqA18E7r6qsmK9PJzwQBeG1wYlHHgHtI3iJNAi3HKSGA4Sp5MeVlp5XvmeaG8lSO97jNJMRX0wjpZ5SLaXdC43s8UBtYL4Jm9GPqL47xfNPQvLdBTytNUfRH8ZYYTcVMsfSWwCjkvE6VbB1MSRwdIPEgNlFFJ+pxp0e8vfc+w7ApQA52LjGAJsdSQW2Ho449mTp8HKwW1WDiDwEM1dmyPqgYK9xRgVM0YQE3bZwKtElLvUwv/+BMQZwSr2tBi+61JaTQJmUwcesH/3lXqGQtbZS/NJI2edWe+oxNsm1nCjzehADFr8DXRbv3IApT8s3XmcXswv9WeVB7oR4562MeJyEMRFXVVomvqpUOUdtKduxErH7+sIcVMxkAVU5TQndh6vWXIBtV0waUyeDK6O93xzeQOeMmadBgf2bMya5bWZXrFJrthP5mJZSVNpj6olYaWUBI2X8baWUNuugLpfrlqBJT6Nz7sdlKb32vd3N85RlG8qGwMlQ4KebRwKsY7cuuyT0qlu0day54vmZyPCzjKrN2CXGqjKesEbEswqD3yoCcns4/tuGn1TkxKeK8bw4md4Eb6djILKJh3mn4i0P5WykhvrN5Sb/SWKDUKcmN7NkffOQ6peNTFSaTC6T3pq/lF3k5+f3JfEmUEJNh0ZBU6qKja1IbYNTmFzsZsZw3miECJsxY0Lit+abkFDmms2+k+RE9XGagaIpjaFLIyC/FzJwUzexN3zTaHGuuwLUbA3emBoiTor7qgTQ6LBh5WYMImaDe/Hp3PcfAQbH3FhtFf6PU0ItN1IAPfmyveN/XpLPHPl8P9YmInb7g3XxYsGLWYhFB5hiMOWByGIhQGx1dfPrbMu3g8pS0uizR8+YYQRGJUIZ5iVpR8RtnfkcuK+PyPLAFpT9N088SHMxk7WflzcCPFYlnr2rwf39wptWMgQR4AaSvX6zuL+cTyhNwIJzHNzLLukh4qfecdNDV4HrtYCF3LgR3yfIdF70iTHAoRgXW4ZfXBSEzRstCk70rn1qde4XRz5A0ExcV/NS114EHZSsKkdJdNETQmw3Sgt1OUB26Lqr1eW5kxOjVOFACEmDjtyaWBQ0VAhw10B8AGV2SSOVMZb3HaRrkEOele26rV004tYGSRass3aIAn5e1Bbl1jXwsRR4nhcqv/8HoCQmHHR2sN3anZZpCPRL0VwhJ/IWVE/Ad3InJAHWVyGa852GzQXJVbZvumyQgWZOsSmag48dJHypVWlH1c0JntvenjTu6vDDyKDW0TUBFaN9znCK9xaLsCzc+KLMBJnIvJ/h X-Forefront-Antispam-Report: CIP:216.228.118.233; CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc7edge2.nvidia.com; CAT:NONE; SFS:(13230040)(82310400026)(1800799024)(36860700013)(376014)(7416014); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Jul 2024 15:13:44.6953 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 55cb9556-631a-4ff9-2d32-08dc99e0664e X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.118.233]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000EE3E.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL1PR12MB5898 SDHCI vendor tuning registers are configured using config setting framework. List available field config for Tegra SDHCI controllers. Signed-off-by: Krishna Yarlagadda --- .../misc/nvidia,tegra-config-settings.yaml | 31 +++++++++++++++++++ 1 file changed, 31 insertions(+) diff --git a/Documentation/devicetree/bindings/misc/nvidia,tegra-config-settings.yaml b/Documentation/devicetree/bindings/misc/nvidia,tegra-config-settings.yaml index 5f4da633e69b..f4440cb6286d 100644 --- a/Documentation/devicetree/bindings/misc/nvidia,tegra-config-settings.yaml +++ b/Documentation/devicetree/bindings/misc/nvidia,tegra-config-settings.yaml @@ -38,6 +38,32 @@ patternProperties: additionalProperties: false patternProperties: + "^sdhci-[a-z0-9_-]+-cfg$": + description: Config settings for SDHCI devices. + SDHCI has configuration based on device speed modes. + - common is set on all speeds and can be overridden by speed mode. + - List of speed modes and their config name + "default", /* MMC_TIMING_LEGACY */ + "sd-mmc-highspeed", /* MMC_TIMING_MMC_HS */ + "sd-mmc-highspeed", /* MMC_TIMING_SD_HS */ + "uhs-sdr12", /* MMC_TIMING_UHS_SDR12 */ + "uhs-sdr25", /* MMC_TIMING_UHS_SDR25 */ + "uhs-sdr50", /* MMC_TIMING_UHS_SDR50 */ + "uhs-sdr104", /* MMC_TIMING_UHS_SDR104 */ + "uhs-ddr52", /* MMC_TIMING_UHS_DDR50 */ + "uhs-ddr52", /* MMC_TIMING_MMC_DDR52 */ + "mmc-hs200", /* MMC_TIMING_MMC_HS200 */ + "mmc-hs400", /* MMC_TIMING_MMC_HS400 */ + type: object + additionalProperties: false + + properties: + nvidia,mmc-num-tuning-iter: + description: Specify DQS trim value for HS400 timing. + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 0xffff + "^i2c-[a-z0-9_]+-cfg$": description: Config settings for I2C devices. type: object @@ -124,4 +150,9 @@ examples: nvidia,i2c-sclk-high-period = <0x07>; }; }; + configmmc1: config-mmc3400000 { + sdhci-mmc-hs200-cfg { + nvidia,mmc-num-tuning-iter = <0x02>; + }; + }; };