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Fri, 01 Nov 2024 03:15:40 +0000 Received: from APBLRPPMTA02.qualcomm.com (APBLRPPMTA02.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 4A13FeNC010587; Fri, 1 Nov 2024 03:15:40 GMT Received: from hu-maiyas-hyd.qualcomm.com (hu-spuppala-hyd.qualcomm.com [10.213.108.54]) by APBLRPPMTA02.qualcomm.com (PPS) with ESMTP id 4A13FeVv010581; Fri, 01 Nov 2024 03:15:40 +0000 Received: by hu-maiyas-hyd.qualcomm.com (Postfix, from userid 4137148) id 7F3155006D5; Fri, 1 Nov 2024 08:45:39 +0530 (+0530) From: Seshu Madhavi Puppala To: Adrian Hunter , Asutosh Das , Ulf Hansson Cc: Ritesh Harjani , linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, quic_gaurkash@quicinc.com, quic_neersoni@quicinc.com, quic_spuppala@quicinc.com Subject: [PATCH RFC 2/6] mmc: host: add support to derive software secret Date: Fri, 1 Nov 2024 08:45:35 +0530 Message-Id: <20241101031539.13285-3-quic_spuppala@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20241101031539.13285-1-quic_spuppala@quicinc.com> References: <20241101031539.13285-1-quic_spuppala@quicinc.com> X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: ezw1nIAHbb5kSMANJs-rKadhV2HWSYSU X-Proofpoint-ORIG-GUID: ezw1nIAHbb5kSMANJs-rKadhV2HWSYSU X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 phishscore=0 priorityscore=1501 malwarescore=0 lowpriorityscore=0 adultscore=0 mlxscore=0 mlxlogscore=999 spamscore=0 suspectscore=0 clxscore=1015 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2409260000 definitions=main-2411010022 Precedence: bulk X-Mailing-List: linux-mmc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Block crypto allows storage controllers like MMC to register an op derive a software secret from wrapped keys added to the kernel. Wrapped keys in most cases will have vendor specific implementations, which means this op would need to have a corresponding MMC variant op. This change adds hooks in MMC to support this variant ops and tie them to the blk crypto op. Signed-off-by: Seshu Madhavi Puppala --- drivers/mmc/host/cqhci-crypto.c | 14 ++++++++++++++ drivers/mmc/host/cqhci.h | 5 +++++ 2 files changed, 19 insertions(+) diff --git a/drivers/mmc/host/cqhci-crypto.c b/drivers/mmc/host/cqhci-crypto.c index c4e7ae95bc7d..e2a4700f3153 100644 --- a/drivers/mmc/host/cqhci-crypto.c +++ b/drivers/mmc/host/cqhci-crypto.c @@ -128,6 +128,19 @@ static int cqhci_crypto_keyslot_evict(struct blk_crypto_profile *profile, return cqhci_crypto_clear_keyslot(cq_host, slot); } +static int cqhci_crypto_derive_sw_secret(struct blk_crypto_profile *profile, + const u8 wkey[], size_t wkey_size, + u8 sw_secret[BLK_CRYPTO_SW_SECRET_SIZE]) +{ + struct cqhci_host *cq_host = cqhci_host_from_crypto_profile(profile); + + if (cq_host->ops && cq_host->ops->derive_sw_secret) + return cq_host->ops->derive_sw_secret(cq_host, wkey, wkey_size, + sw_secret); + + return -EOPNOTSUPP; +} + /* * The keyslot management operations for CQHCI crypto. * @@ -139,6 +152,7 @@ static int cqhci_crypto_keyslot_evict(struct blk_crypto_profile *profile, static const struct blk_crypto_ll_ops cqhci_crypto_ops = { .keyslot_program = cqhci_crypto_keyslot_program, .keyslot_evict = cqhci_crypto_keyslot_evict, + .derive_sw_secret = cqhci_crypto_derive_sw_secret, }; static enum blk_crypto_mode_num diff --git a/drivers/mmc/host/cqhci.h b/drivers/mmc/host/cqhci.h index f6bc66bc6418..77368fb97eba 100644 --- a/drivers/mmc/host/cqhci.h +++ b/drivers/mmc/host/cqhci.h @@ -286,6 +286,8 @@ struct cqhci_host { #endif }; +/* @derive_sw_secret: derive sw secret from a wrapped key + */ struct cqhci_host_ops { void (*dumpregs)(struct mmc_host *mmc); void (*write_l)(struct cqhci_host *host, u32 val, int reg); @@ -300,6 +302,9 @@ struct cqhci_host_ops { int (*program_key)(struct cqhci_host *cq_host, const struct blk_crypto_key *bkey, const union cqhci_crypto_cfg_entry *cfg, int slot); + int (*derive_sw_secret)(struct cqhci_host *cq_host, const u8 wkey[], + unsigned int wkey_size, + u8 sw_secret[BLK_CRYPTO_SW_SECRET_SIZE]); #endif void (*set_tran_desc)(struct cqhci_host *cq_host, u8 **desc, dma_addr_t addr, int len, bool end, bool dma64);