From patchwork Tue Nov 19 16:40:16 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Wanner X-Patchwork-Id: 844422 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 201D41D2F43; Tue, 19 Nov 2024 16:41:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.154.123 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1732034482; cv=none; b=ngz7xaxKkeXpqk1XR0JhzeFESwgOaLUK+esS7Zc2/hVVH2KilCHdubApEy3RTRR7Ecc3q+WWMYbPbLs/6Vvb3bsg+nm+G0+2Qd3Dknd5K4+AMKr556eW9uyx7zeyNz0/7mQWu5I6ibADaF2k+kbqyQmeVL0GZBqfqEo5emFsBmE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1732034482; c=relaxed/simple; bh=zkAh9HenNpHQuCQrbp173zO6mD0wuhiHB7XhQH3SHGQ=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=Q2qBCeG6Ug9LGJaXR+yIKkiOX/zWRZoftCLNjzs3CtY+w0LoPWkqvt16go+if12qyPvZ8gRcvuh4lmNLSzFz9l7fUi1NDzP3TXQmPRtZXdevkei+9E3CF2VCNjxrIZ4BVpk7CHZTrUnKm6NR6maX4DHE5sezd9XDW8CwugvKL88= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=cByeKzwN; arc=none smtp.client-ip=68.232.154.123 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="cByeKzwN" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1732034480; x=1763570480; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=zkAh9HenNpHQuCQrbp173zO6mD0wuhiHB7XhQH3SHGQ=; b=cByeKzwNX7hL6efgk4JwfTr1vKgr9vTgPp6ceJ4HGce22cYlEyXfFQpA cm2TDZCJybTqtQtkhu41KJcQod1ijZRVqitgrJ2HzJh1ZimkdITFZQCYL ET3GsffwpeiUVCRhHU1UeinYHJyAd+qSkPTviBTawdSZKtZSZBJNglLuy NNJ3P9hqRpPBrwdMT1m+DQWXvJaA6ah85veYWiU94ggExK8WobtJgHvB9 D19ZVWHcfM/7NYKMyqxWhemVBbfB3m3dy4KtPTX16lFin7VS2LnBnz5HM Rkv9JBnE5Rb8BMeEdvU+JNHWH158HXhrA3hVmomvwe3t8rSqkzR636UyS A==; X-CSE-ConnectionGUID: jnnvkeRdTYaD0RwnHEXOug== X-CSE-MsgGUID: S7L0v21FRZOFELRzcaONHw== X-IronPort-AV: E=Sophos;i="6.12,166,1728975600"; d="scan'208";a="35018899" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa2.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 19 Nov 2024 09:41:15 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Tue, 19 Nov 2024 09:40:55 -0700 Received: from ryan-Precision-3630-Tower.microchip.com (10.10.85.11) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Tue, 19 Nov 2024 09:40:55 -0700 From: To: , , , , , , , , CC: , , , , , , , , , , , , Ryan Wanner Subject: [PATCH 10/15] ARM: configs: at91: sama7: add new SoC config Date: Tue, 19 Nov 2024 09:40:16 -0700 Message-ID: <4c7750b6f29b4ac0e2858ac279af7548e19934bc.1732030972.git.Ryan.Wanner@microchip.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-mmc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Ryan Wanner Add sama7d65 to the sama7_defconfig. Signed-off-by: Ryan Wanner Signed-off-by: Varshini Rajendran --- arch/arm/configs/multi_v7_defconfig | 1 + arch/arm/configs/sama7_defconfig | 1 + arch/arm/mach-at91/Kconfig | 12 ++++++++++++ 3 files changed, 14 insertions(+) diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig index 9a5f5c439b87..417716701676 100644 --- a/arch/arm/configs/multi_v7_defconfig +++ b/arch/arm/configs/multi_v7_defconfig @@ -20,6 +20,7 @@ CONFIG_ARCH_AT91=y CONFIG_SOC_SAMA5D2=y CONFIG_SOC_SAMA5D3=y CONFIG_SOC_SAMA5D4=y +CONFIG_SOC_SAMA7D65=y CONFIG_SOC_SAMA7G5=y CONFIG_SOC_LAN966=y CONFIG_ARCH_BCM=y diff --git a/arch/arm/configs/sama7_defconfig b/arch/arm/configs/sama7_defconfig index 1a2e93c8ee71..ea7ddf640ba7 100644 --- a/arch/arm/configs/sama7_defconfig +++ b/arch/arm/configs/sama7_defconfig @@ -12,6 +12,7 @@ CONFIG_EXPERT=y # CONFIG_IO_URING is not set CONFIG_KALLSYMS_ALL=y CONFIG_ARCH_AT91=y +CONFIG_SOC_SAMA7D65=y CONFIG_SOC_SAMA7G5=y CONFIG_ATMEL_CLOCKSOURCE_TCB=y # CONFIG_CACHE_L2X0 is not set diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index 344f5305f69a..b64d0db4bce7 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig @@ -58,6 +58,18 @@ config SOC_SAMA5D4 help Select this if you are using one of Microchip's SAMA5D4 family SoC. +config SOC_SAMA7D65 + bool "SAMA7D65 family" + depends on ARCH_MULTI_V7 + select HAVE_AT91_GENERATED_CLK + select HAVE_AT91_SAM9X60_PLL + select HAVE_AT91_USB_CLK + select HAVE_AT91_UTMI + select PM_OPP + select SOC_SAMA7 + help + Select this if you are using one of Microchip's SAMA7D65 family SoC. + config SOC_SAMA7G5 bool "SAMA7G5 family" depends on ARCH_MULTI_V7