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[v2,0/3] PCI: J721E: Fix Broken DT w.r.t SYSCON DT

Message ID 20201204075117.10430-1-kishon@ti.com
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Series PCI: J721E: Fix Broken DT w.r.t SYSCON DT | expand

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Kishon Vijay Abraham I Dec. 4, 2020, 7:51 a.m. UTC
Previously a subnode to syscon node was added which has the
exact memory mapped address of pcie_ctrl but based on review comment
provided by Rob [1], the offset is now being passed as argument to
"ti,syscon-pcie-ctrl" phandle.

This series has both driver change and DT change. The driver change
should be merged first and the driver takes care of maintaining old
DT compatibility.

Changes frm v1:
*) Remove use of allOf in schema
*) Added Fixes tag
*) Maintain old DT compatibility

[1] -> http://lore.kernel.org/r/CAL_JsqKiUcO76bo1GoepWM1TusJWoty_BRy2hFSgtEVMqtrvvQ@mail.gmail.com

Kishon Vijay Abraham I (3):
  dt-bindings: pci: ti,j721e: Fix "ti,syscon-pcie-ctrl" to take argument
  PCI: j721e: Get offset within "syscon" from "ti,syscon-pcie-ctrl"
    phandle arg
  arm64: dts: ti: k3-j721e-main: Remove "syscon" nodes added for
    pcieX_ctrl

 .../bindings/pci/ti,j721e-pci-ep.yaml         | 11 +++--
 .../bindings/pci/ti,j721e-pci-host.yaml       | 11 +++--
 arch/arm64/boot/dts/ti/k3-j721e-main.dtsi     | 48 ++++---------------
 drivers/pci/controller/cadence/pci-j721e.c    | 28 +++++++----
 4 files changed, 41 insertions(+), 57 deletions(-)

Comments

Rob Herring Dec. 7, 2020, 2:29 p.m. UTC | #1
On Fri, Dec 4, 2020 at 1:52 AM Kishon Vijay Abraham I <kishon@ti.com> wrote:
>
> Fix binding documentation of "ti,syscon-pcie-ctrl" to take phandle with
> argument. The argument is the register offset within "syscon" used to
> configure PCIe controller. This change is as discussed in [1]
>
> [1] -> http://lore.kernel.org/r/CAL_JsqKiUcO76bo1GoepWM1TusJWoty_BRy2hFSgtEVMqtrvvQ@mail.gmail.com
>
> Fixes: 431b53b81cdc ("dt-bindings: PCI: Add host mode dt-bindings for TI's J721E SoC")
> Fixes: 45b39e928966 ("dt-bindings: PCI: Add EP mode dt-bindings for TI's J721E SoC")
> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
> ---
>  .../devicetree/bindings/pci/ti,j721e-pci-ep.yaml      | 11 +++++++----
>  .../devicetree/bindings/pci/ti,j721e-pci-host.yaml    | 11 +++++++----
>  2 files changed, 14 insertions(+), 8 deletions(-)

Reviewed-by: Rob Herring <robh@kernel.org>
Kishon Vijay Abraham I Dec. 10, 2020, 6:47 a.m. UTC | #2
Hi Lorenzo,

On 04/12/20 1:21 pm, Kishon Vijay Abraham I wrote:
> Previously a subnode to syscon node was added which has the

> exact memory mapped address of pcie_ctrl but based on review comment

> provided by Rob [1], the offset is now being passed as argument to

> "ti,syscon-pcie-ctrl" phandle.

> 

> This series has both driver change and DT change. The driver change

> should be merged first and the driver takes care of maintaining old

> DT compatibility.


Can you queue the 1st two patches of this series for this merge window?
I'll ask NM to queue the DTS patch. Let me know if you want me to resend
only the first two patches as a separate series.

Thank You,
Kishon

> 

> Changes frm v1:

> *) Remove use of allOf in schema

> *) Added Fixes tag

> *) Maintain old DT compatibility

> 

> [1] -> http://lore.kernel.org/r/CAL_JsqKiUcO76bo1GoepWM1TusJWoty_BRy2hFSgtEVMqtrvvQ@mail.gmail.com

> 

> Kishon Vijay Abraham I (3):

>   dt-bindings: pci: ti,j721e: Fix "ti,syscon-pcie-ctrl" to take argument

>   PCI: j721e: Get offset within "syscon" from "ti,syscon-pcie-ctrl"

>     phandle arg

>   arm64: dts: ti: k3-j721e-main: Remove "syscon" nodes added for

>     pcieX_ctrl

> 

>  .../bindings/pci/ti,j721e-pci-ep.yaml         | 11 +++--

>  .../bindings/pci/ti,j721e-pci-host.yaml       | 11 +++--

>  arch/arm64/boot/dts/ti/k3-j721e-main.dtsi     | 48 ++++---------------

>  drivers/pci/controller/cadence/pci-j721e.c    | 28 +++++++----

>  4 files changed, 41 insertions(+), 57 deletions(-)

>
Kishon Vijay Abraham I Dec. 10, 2020, 12:39 p.m. UTC | #3
Hi Lorenzo,

On 10/12/20 12:17 pm, Kishon Vijay Abraham I wrote:
> Hi Lorenzo,

> 

> On 04/12/20 1:21 pm, Kishon Vijay Abraham I wrote:

>> Previously a subnode to syscon node was added which has the

>> exact memory mapped address of pcie_ctrl but based on review comment

>> provided by Rob [1], the offset is now being passed as argument to

>> "ti,syscon-pcie-ctrl" phandle.

>>

>> This series has both driver change and DT change. The driver change

>> should be merged first and the driver takes care of maintaining old

>> DT compatibility.

> 

> Can you queue the 1st two patches of this series for this merge window?

> I'll ask NM to queue the DTS patch. Let me know if you want me to resend

> only the first two patches as a separate series.


Never mind, I'll resend the pending patches for which I have already got
Acks from Rob.

Thank You,
Kishon

> 

> Thank You,

> Kishon

> 

>>

>> Changes frm v1:

>> *) Remove use of allOf in schema

>> *) Added Fixes tag

>> *) Maintain old DT compatibility

>>

>> [1] -> http://lore.kernel.org/r/CAL_JsqKiUcO76bo1GoepWM1TusJWoty_BRy2hFSgtEVMqtrvvQ@mail.gmail.com

>>

>> Kishon Vijay Abraham I (3):

>>   dt-bindings: pci: ti,j721e: Fix "ti,syscon-pcie-ctrl" to take argument

>>   PCI: j721e: Get offset within "syscon" from "ti,syscon-pcie-ctrl"

>>     phandle arg

>>   arm64: dts: ti: k3-j721e-main: Remove "syscon" nodes added for

>>     pcieX_ctrl

>>

>>  .../bindings/pci/ti,j721e-pci-ep.yaml         | 11 +++--

>>  .../bindings/pci/ti,j721e-pci-host.yaml       | 11 +++--

>>  arch/arm64/boot/dts/ti/k3-j721e-main.dtsi     | 48 ++++---------------

>>  drivers/pci/controller/cadence/pci-j721e.c    | 28 +++++++----

>>  4 files changed, 41 insertions(+), 57 deletions(-)

>>