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[209.132.180.67]) by mx.google.com with ESMTP id bi5si3220286pbb.191.2014.03.28.01.36.07; Fri, 28 Mar 2014 01:36:07 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751583AbaC1IgF (ORCPT + 5 others); Fri, 28 Mar 2014 04:36:05 -0400 Received: from arroyo.ext.ti.com ([192.94.94.40]:46980 "EHLO arroyo.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751164AbaC1IgB (ORCPT ); Fri, 28 Mar 2014 04:36:01 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by arroyo.ext.ti.com (8.13.7/8.13.7) with ESMTP id s2S8ZYG8029411; Fri, 28 Mar 2014 03:35:34 -0500 Received: from DLEE70.ent.ti.com (dlee70.ent.ti.com [157.170.170.113]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id s2S8ZYdp003088; Fri, 28 Mar 2014 03:35:34 -0500 Received: from dflp32.itg.ti.com (10.64.6.15) by DLEE70.ent.ti.com (157.170.170.113) with Microsoft SMTP Server id 14.3.174.1; Fri, 28 Mar 2014 03:35:34 -0500 Received: from psplinux063.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id s2S8ZU9n023701; Fri, 28 Mar 2014 03:35:32 -0500 From: Sekhar Nori To: Tony Lindgren CC: Linux OMAP Mailing List , Linux ARM Mailing List , Sekhar Nori Subject: [PATCH 2/2] ARM: OMAP2+: AM43x: L2 cache support Date: Fri, 28 Mar 2014 14:05:29 +0530 Message-ID: <013dda556020e852a1bc5b875427e68ab9fdf69a.1395994759.git.nsekhar@ti.com> X-Mailer: git-send-email 1.7.10.1 In-Reply-To: <5ea7277c21215c7b4aa776d5379dc2d6263228c6.1395994759.git.nsekhar@ti.com> References: <5ea7277c21215c7b4aa776d5379dc2d6263228c6.1395994759.git.nsekhar@ti.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: nsekhar@ti.com X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.220.172 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , From: Afzal Mohammed Add support for L2 cache controller (PL310) on AM437x SoC. Signed-off-by: Afzal Mohammed Signed-off-by: Sekhar Nori --- arch/arm/mach-omap2/Kconfig | 1 + arch/arm/mach-omap2/omap4-common.c | 8 +++++++- 2 files changed, 8 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index 1124155..1fd34d2 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -65,6 +65,7 @@ config SOC_AM43XX select ARCH_HAS_OPP select ARM_GIC select MACH_OMAP_GENERIC + select MIGHT_HAVE_CACHE_L2X0 config SOC_DRA7XX bool "TI DRA7XX" diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c index 8f18460..763a169 100644 --- a/arch/arm/mach-omap2/omap4-common.c +++ b/arch/arm/mach-omap2/omap4-common.c @@ -188,7 +188,7 @@ static int __init omap_l2_cache_init(void) * To avoid code running on other OMAPs in * multi-omap builds */ - if (!cpu_is_omap44xx()) + if (!cpu_is_omap44xx() && !soc_is_am43xx()) return -ENODEV; /* Static mapping, never released */ @@ -200,6 +200,7 @@ static int __init omap_l2_cache_init(void) * 16-way associativity, parity disabled * Way size - 32KB (es1.0) * Way size - 64KB (es2.0 +) + * Way size - 16KB (am43xx) */ aux_ctrl = ((1 << L2X0_AUX_CTRL_ASSOCIATIVITY_SHIFT) | (0x1 << 25) | @@ -208,6 +209,11 @@ static int __init omap_l2_cache_init(void) if (omap_rev() == OMAP4430_REV_ES1_0) { aux_ctrl |= 0x2 << L2X0_AUX_CTRL_WAY_SIZE_SHIFT; + } else if (soc_is_am43xx()) { + aux_ctrl |= ((0x1 << L2X0_AUX_CTRL_WAY_SIZE_SHIFT) | + (1 << L2X0_AUX_CTRL_DATA_PREFETCH_SHIFT) | + (1 << L2X0_AUX_CTRL_INSTR_PREFETCH_SHIFT) | + (1 << L2X0_AUX_CTRL_EARLY_BRESP_SHIFT)); } else { aux_ctrl |= ((0x3 << L2X0_AUX_CTRL_WAY_SIZE_SHIFT) | (1 << L2X0_AUX_CTRL_SHARE_OVERRIDE_SHIFT) |