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[209.132.180.67]) by mx.google.com with ESMTP id ot3si22206635pac.224.2014.02.12.02.20.23; Wed, 12 Feb 2014 02:20:23 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752875AbaBLKUJ (ORCPT + 27 others); Wed, 12 Feb 2014 05:20:09 -0500 Received: from devils.ext.ti.com ([198.47.26.153]:42346 "EHLO devils.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752835AbaBLKUE (ORCPT ); Wed, 12 Feb 2014 05:20:04 -0500 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by devils.ext.ti.com (8.13.7/8.13.7) with ESMTP id s1CAJjPr023674; Wed, 12 Feb 2014 04:19:45 -0600 Received: from DLEE71.ent.ti.com (dlee71.ent.ti.com [157.170.170.114]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id s1CAJjux032051; Wed, 12 Feb 2014 04:19:45 -0600 Received: from dlep33.itg.ti.com (157.170.170.75) by DLEE71.ent.ti.com (157.170.170.114) with Microsoft SMTP Server id 14.2.342.3; Wed, 12 Feb 2014 04:19:44 -0600 Received: from localhost.localdomain (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id s1CAJApf013932; Wed, 12 Feb 2014 04:19:42 -0600 From: Roger Quadros To: , , CC: , , , , , , , , Roger Quadros Subject: [PATCH v7 09/12] ARM: dts: omap5-uevm: Provide USB PHY clock Date: Wed, 12 Feb 2014 12:18:50 +0200 Message-ID: <1392200333-28397-10-git-send-email-rogerq@ti.com> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1392200333-28397-1-git-send-email-rogerq@ti.com> References: <1392200333-28397-1-git-send-email-rogerq@ti.com> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: rogerq@ti.com X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.128.182 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , The HS USB 2 PHY gets its clock from AUXCLK1. Provide this information. Signed-off-by: Roger Quadros --- arch/arm/boot/dts/omap5-uevm.dts | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/arch/arm/boot/dts/omap5-uevm.dts b/arch/arm/boot/dts/omap5-uevm.dts index 002fa70..3b99ec2 100644 --- a/arch/arm/boot/dts/omap5-uevm.dts +++ b/arch/arm/boot/dts/omap5-uevm.dts @@ -31,12 +31,8 @@ hsusb2_phy: hsusb2_phy { compatible = "usb-nop-xceiv"; reset-gpios = <&gpio3 16 GPIO_ACTIVE_LOW>; /* gpio3_80 HUB_NRESET */ - /** - * FIXME - * Put the right clock phandle here when available - * clocks = <&auxclk1>; - * clock-names = "main_clk"; - */ + clocks = <&auxclk1_ck>; + clock-names = "main_clk"; clock-frequency = <19200000>; };