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[209.132.180.67]) by mx.google.com with ESMTP id xu6si22261633pab.22.2014.02.12.02.21.31; Wed, 12 Feb 2014 02:21:31 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752903AbaBLKUR (ORCPT + 27 others); Wed, 12 Feb 2014 05:20:17 -0500 Received: from arroyo.ext.ti.com ([192.94.94.40]:35452 "EHLO arroyo.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752864AbaBLKUJ (ORCPT ); Wed, 12 Feb 2014 05:20:09 -0500 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by arroyo.ext.ti.com (8.13.7/8.13.7) with ESMTP id s1CAJfJR008754; Wed, 12 Feb 2014 04:19:41 -0600 Received: from DFLE72.ent.ti.com (dfle72.ent.ti.com [128.247.5.109]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id s1CAJfrS032028; Wed, 12 Feb 2014 04:19:41 -0600 Received: from dlep33.itg.ti.com (157.170.170.75) by DFLE72.ent.ti.com (128.247.5.109) with Microsoft SMTP Server id 14.3.174.1; Wed, 12 Feb 2014 04:19:41 -0600 Received: from localhost.localdomain (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id s1CAJApe013932; Wed, 12 Feb 2014 04:19:38 -0600 From: Roger Quadros To: , , CC: , , , , , , , , Roger Quadros Subject: [PATCH v7 08/12] ARM: dts: omap4-panda: Provide USB PHY clock Date: Wed, 12 Feb 2014 12:18:49 +0200 Message-ID: <1392200333-28397-9-git-send-email-rogerq@ti.com> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1392200333-28397-1-git-send-email-rogerq@ti.com> References: <1392200333-28397-1-git-send-email-rogerq@ti.com> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: rogerq@ti.com X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.212.49 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , The USB PHY gets its clock from AUXCLK3. Provide this information. Signed-off-by: Roger Quadros --- arch/arm/boot/dts/omap4-panda-common.dtsi | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/arch/arm/boot/dts/omap4-panda-common.dtsi b/arch/arm/boot/dts/omap4-panda-common.dtsi index 88c6a05..50b72966 100644 --- a/arch/arm/boot/dts/omap4-panda-common.dtsi +++ b/arch/arm/boot/dts/omap4-panda-common.dtsi @@ -83,12 +83,8 @@ compatible = "usb-nop-xceiv"; reset-gpios = <&gpio2 30 GPIO_ACTIVE_LOW>; /* gpio_62 */ vcc-supply = <&hsusb1_power>; - /** - * FIXME: - * put the right clock phandle here when available - * clocks = <&auxclk3>; - * clock-names = "main_clk"; - */ + clocks = <&auxclk3_ck>; + clock-names = "main_clk"; clock-frequency = <19200000>; };