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[209.132.180.67]) by mx.google.com with ESMTP id gz8si1352577pac.56.2014.02.13.01.01.32; Thu, 13 Feb 2014 01:01:32 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753449AbaBMJBa (ORCPT + 5 others); Thu, 13 Feb 2014 04:01:30 -0500 Received: from bear.ext.ti.com ([192.94.94.41]:58380 "EHLO bear.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753423AbaBMJB3 (ORCPT ); Thu, 13 Feb 2014 04:01:29 -0500 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by bear.ext.ti.com (8.13.7/8.13.7) with ESMTP id s1D915Na032732; Thu, 13 Feb 2014 03:01:05 -0600 Received: from DLEE71.ent.ti.com (dlee71.ent.ti.com [157.170.170.114]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id s1D915KF012467; Thu, 13 Feb 2014 03:01:05 -0600 Received: from dlep33.itg.ti.com (157.170.170.75) by DLEE71.ent.ti.com (157.170.170.114) with Microsoft SMTP Server id 14.2.342.3; Thu, 13 Feb 2014 03:01:04 -0600 Received: from localhost.localdomain (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id s1D911bj021319; Thu, 13 Feb 2014 03:01:03 -0600 From: Tero Kristo To: , CC: , Subject: [PATCH 1/4] clk: ti: mux: add support for default-parenting Date: Thu, 13 Feb 2014 11:00:45 +0200 Message-ID: <1392282048-6284-2-git-send-email-t-kristo@ti.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1392282048-6284-1-git-send-email-t-kristo@ti.com> References: <1392282048-6284-1-git-send-email-t-kristo@ti.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: t-kristo@ti.com X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.220.173 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , ti,mux-clock now supports ti,default-parent property, which can be used to configure the default parent of the clock during boot. This property can be added to board specific files, or under the clock data itself. Signed-off-by: Tero Kristo --- Documentation/devicetree/bindings/clock/ti/mux.txt | 7 ++++++ drivers/clk/ti/mux.c | 24 ++++++++++++++++++-- 2 files changed, 29 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/clock/ti/mux.txt b/Documentation/devicetree/bindings/clock/ti/mux.txt index 2d0d170..4e291eb 100644 --- a/Documentation/devicetree/bindings/clock/ti/mux.txt +++ b/Documentation/devicetree/bindings/clock/ti/mux.txt @@ -48,6 +48,8 @@ Optional properties: zero - ti,set-rate-parent : clk_set_rate is propagated to parent clock, not supported by the composite-mux-clock subtype +- ti,default-parent : configures mux parent during boot to be the provided + phandle clock Examples: @@ -65,6 +67,7 @@ abe_dpll_bypass_clk_mux_ck: abe_dpll_bypass_clk_mux_ck@4a306108 { clocks = <&sys_clkin_ck>, <&sys_32k_ck>; ti,bit-shift = <24>; reg = <0x0108>; + ti,default-parent = <&sys_32k_ck>; }; mcbsp5_mux_fck: mcbsp5_mux_fck { @@ -74,3 +77,7 @@ mcbsp5_mux_fck: mcbsp5_mux_fck { ti,bit-shift = <4>; reg = <0x02d8>; }; + +&mcbsp5_mux_fck { + ti,default-parent = <&mcbsp_clks>; +}; diff --git a/drivers/clk/ti/mux.c b/drivers/clk/ti/mux.c index 0197a47..557a7ce 100644 --- a/drivers/clk/ti/mux.c +++ b/drivers/clk/ti/mux.c @@ -108,7 +108,8 @@ static struct clk *_register_mux(struct device *dev, const char *name, const char **parent_names, u8 num_parents, unsigned long flags, void __iomem *reg, u8 shift, u32 mask, u8 clk_mux_flags, - u32 *table, spinlock_t *lock) + u32 *table, int default_parent, + spinlock_t *lock) { struct clk_mux *mux; struct clk *clk; @@ -136,6 +137,9 @@ static struct clk *_register_mux(struct device *dev, const char *name, mux->table = table; mux->hw.init = &init; + if (default_parent >= 0) + ti_clk_mux_set_parent(&mux->hw, default_parent); + clk = clk_register(dev, &mux->hw); if (IS_ERR(clk)) @@ -161,6 +165,8 @@ static void of_mux_clk_setup(struct device_node *node) u32 mask = 0; u32 shift = 0; u32 flags = 0; + struct device_node *default_parent; + int default_parent_idx = -1; num_parents = of_clk_get_parent_count(node); if (num_parents < 2) { @@ -174,6 +180,19 @@ static void of_mux_clk_setup(struct device_node *node) for (i = 0; i < num_parents; i++) parent_names[i] = of_clk_get_parent_name(node, i); + default_parent = of_parse_phandle(node, "ti,default-parent", 0); + + if (default_parent) { + for (i = 0; i < num_parents; i++) { + struct device_node *tmp; + tmp = of_parse_phandle(node, "clocks", i); + if (tmp == default_parent) { + default_parent_idx = i; + break; + } + } + } + reg = ti_clk_get_reg_addr(node, 0); if (!reg) @@ -195,7 +214,8 @@ static void of_mux_clk_setup(struct device_node *node) mask = (1 << fls(mask)) - 1; clk = _register_mux(NULL, node->name, parent_names, num_parents, flags, - reg, shift, mask, clk_mux_flags, NULL, NULL); + reg, shift, mask, clk_mux_flags, NULL, + default_parent_idx, NULL); if (!IS_ERR(clk)) of_clk_add_provider(node, of_clk_src_simple_get, clk);