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[209.132.180.67]) by mx.google.com with ESMTP id ub8si7817913pac.184.2014.03.07.02.16.44; Fri, 07 Mar 2014 02:16:44 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752951AbaCGKQf (ORCPT + 26 others); Fri, 7 Mar 2014 05:16:35 -0500 Received: from comal.ext.ti.com ([198.47.26.152]:39977 "EHLO comal.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752618AbaCGKQI (ORCPT ); Fri, 7 Mar 2014 05:16:08 -0500 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id s27AFgXi022898; Fri, 7 Mar 2014 04:15:42 -0600 Received: from DLEE70.ent.ti.com (dlee70.ent.ti.com [157.170.170.113]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id s27AFglm031846; Fri, 7 Mar 2014 04:15:42 -0600 Received: from dlep33.itg.ti.com (157.170.170.75) by DLEE70.ent.ti.com (157.170.170.113) with Microsoft SMTP Server id 14.3.174.1; Fri, 7 Mar 2014 04:15:42 -0600 Received: from localhost.localdomain (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id s27AF90Q011753; Fri, 7 Mar 2014 04:15:39 -0600 From: Roger Quadros To: , CC: , , , , , , , , , , Benoit Cousson Subject: [PATCH v3 8/8] ARM: dts: dra7: add OCP2SCP3 and SATA nodes Date: Fri, 7 Mar 2014 12:15:08 +0200 Message-ID: <1394187308-19622-9-git-send-email-rogerq@ti.com> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1394187308-19622-1-git-send-email-rogerq@ti.com> References: <1394187308-19622-1-git-send-email-rogerq@ti.com> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: rogerq@ti.com X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.220.174 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , From: Balaji T K Add nodes for OCP2SCP3 bus, SATA controller and SATA PHY. [Roger Q] Clean up. CC: Benoit Cousson Signed-off-by: Balaji T K Signed-off-by: Roger Quadros --- arch/arm/boot/dts/dra7.dtsi | 39 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 39 insertions(+) diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi index 9e3caf3..597979b 100644 --- a/arch/arm/boot/dts/dra7.dtsi +++ b/arch/arm/boot/dts/dra7.dtsi @@ -772,6 +772,45 @@ dma-names = "tx0", "rx0"; status = "disabled"; }; + + omap_control_sata: control-phy@4a002374 { + compatible = "ti,control-phy-pipe3"; + reg = <0x4a002374 0x4>; + reg-names = "power"; + clocks = <&sys_clkin1>; + clock-names = "sysclk"; + }; + + /* OCP2SCP3 */ + ocp2scp@4a090000 { + compatible = "ti,omap-ocp2scp"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + reg = <0x4a090000 0x20>; + ti,hwmods = "ocp2scp3"; + sata_phy: phy@4A096000 { + compatible = "ti,phy-pipe3-sata"; + reg = <0x4A096000 0x80>, /* phy_rx */ + <0x4A096400 0x64>, /* phy_tx */ + <0x4A096800 0x40>; /* pll_ctrl */ + reg-names = "phy_rx", "phy_tx", "pll_ctrl"; + ctrl-module = <&omap_control_sata>; + clocks = <&sys_clkin1>; + clock-names = "sysclk"; + #phy-cells = <0>; + }; + }; + + sata: sata@4a141100 { + compatible = "snps,dwc-ahci"; + reg = <0x4a140000 0x1100>, <0x4a141100 0x7>; + interrupts = ; + phys = <&sata_phy>; + phy-names = "sata-phy"; + clocks = <&sata_ref_clk>; + ti,hwmods = "sata"; + }; }; };