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[209.132.180.67]) by mx.google.com with ESMTP id k1si9354231pao.142.2014.03.31.08.18.04; Mon, 31 Mar 2014 08:18:04 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753820AbaCaPSD (ORCPT + 5 others); Mon, 31 Mar 2014 11:18:03 -0400 Received: from devils.ext.ti.com ([198.47.26.153]:58771 "EHLO devils.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753483AbaCaPSB (ORCPT ); Mon, 31 Mar 2014 11:18:01 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by devils.ext.ti.com (8.13.7/8.13.7) with ESMTP id s2VFHYsg021907; Mon, 31 Mar 2014 10:17:34 -0500 Received: from DLEE71.ent.ti.com (dlee71.ent.ti.com [157.170.170.114]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id s2VFHYvx013920; Mon, 31 Mar 2014 10:17:34 -0500 Received: from dflp32.itg.ti.com (10.64.6.15) by DLEE71.ent.ti.com (157.170.170.114) with Microsoft SMTP Server id 14.3.174.1; Mon, 31 Mar 2014 10:17:33 -0500 Received: from localhost.localdomain (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id s2VFGm49013169; Mon, 31 Mar 2014 10:17:32 -0500 From: Tero Kristo To: , , CC: Subject: [PATCH 22/55] ARM: OMAP2: CM: move cm2xxx.h header to a public location Date: Mon, 31 Mar 2014 18:16:01 +0300 Message-ID: <1396278994-12624-23-git-send-email-t-kristo@ti.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1396278994-12624-1-git-send-email-t-kristo@ti.com> References: <1396278994-12624-1-git-send-email-t-kristo@ti.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: t-kristo@ti.com X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.220.169 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , This file needs to be accessible from the PRCM core and mach-omap2 board support code. Signed-off-by: Tero Kristo --- arch/arm/mach-omap2/cm2xxx.c | 2 +- arch/arm/mach-omap2/cm2xxx.h | 52 +-------------------------- arch/arm/mach-omap2/cm_common.c | 2 +- include/linux/power/omap/cm2xxx.h | 70 +++++++++++++++++++++++++++++++++++++ 4 files changed, 73 insertions(+), 53 deletions(-) create mode 100644 include/linux/power/omap/cm2xxx.h diff --git a/arch/arm/mach-omap2/cm2xxx.c b/arch/arm/mach-omap2/cm2xxx.c index e74484a..6f04031 100644 --- a/arch/arm/mach-omap2/cm2xxx.c +++ b/arch/arm/mach-omap2/cm2xxx.c @@ -21,7 +21,7 @@ #include "prm2xxx.h" #include "cm.h" #include "cm2xxx_3xxx_private.h" -#include "cm2xxx.h" +#include #include "clockdomain.h" /* CM_AUTOIDLE_PLL.AUTO_* bit values for DPLLs */ diff --git a/arch/arm/mach-omap2/cm2xxx.h b/arch/arm/mach-omap2/cm2xxx.h index 891d81c..5eaa007 100644 --- a/arch/arm/mach-omap2/cm2xxx.h +++ b/arch/arm/mach-omap2/cm2xxx.h @@ -18,61 +18,11 @@ #include "prcm-common.h" #include "cm2xxx_3xxx.h" +#include #define OMAP2420_CM_REGADDR(module, reg) \ OMAP2_L4_IO_ADDRESS(OMAP2420_CM_BASE + (module) + (reg)) #define OMAP2430_CM_REGADDR(module, reg) \ OMAP2_L4_IO_ADDRESS(OMAP2430_CM_BASE + (module) + (reg)) -/* - * Module specific CM register offsets from CM_BASE + domain offset - * Use cm_{read,write}_mod_reg() with these registers. - * These register offsets generally appear in more than one PRCM submodule. - */ - -/* OMAP2-specific register offsets */ - -#define OMAP24XX_CM_FCLKEN2 0x0004 -#define OMAP24XX_CM_ICLKEN4 0x001c -#define OMAP24XX_CM_AUTOIDLE4 0x003c -#define OMAP24XX_CM_IDLEST4 0x002c - -/* CM_IDLEST bit field values to indicate deasserted IdleReq */ - -#define OMAP24XX_CM_IDLEST_VAL 0 - - -/* Clock management domain register get/set */ - -#ifndef __ASSEMBLER__ - -extern void omap2xxx_cm_clkdm_enable_hwsup(s16 module, u32 mask); -extern void omap2xxx_cm_clkdm_disable_hwsup(s16 module, u32 mask); - -extern void omap2xxx_cm_set_dpll_disable_autoidle(void); -extern void omap2xxx_cm_set_dpll_auto_low_power_stop(void); - -extern void omap2xxx_cm_set_apll54_disable_autoidle(void); -extern void omap2xxx_cm_set_apll54_auto_low_power_stop(void); -extern void omap2xxx_cm_set_apll96_disable_autoidle(void); -extern void omap2xxx_cm_set_apll96_auto_low_power_stop(void); - -extern bool omap2xxx_cm_is_clkdm_in_hwsup(s16 module, u32 mask); -extern int omap2xxx_cm_wait_module_ready(s16 prcm_mod, u8 idlest_id, - u8 idlest_shift); -extern int omap2xxx_cm_split_idlest_reg(void __iomem *idlest_reg, - s16 *prcm_inst, u8 *idlest_reg_id); -extern int omap2xxx_cm_fclks_active(void); -extern int omap2xxx_cm_mpu_retention_allowed(void); -extern u32 omap2xxx_cm_get_core_clk_src(void); -extern u32 omap2xxx_cm_get_core_pll_config(void); -extern u32 omap2xxx_cm_get_pll_config(void); -extern u32 omap2xxx_cm_get_pll_status(void); -extern void omap2xxx_cm_set_mod_dividers(u32 mpu, u32 dsp, u32 gfx, u32 core, - u32 mdm); - -extern int __init omap2xxx_cm_init(void); - -#endif - #endif diff --git a/arch/arm/mach-omap2/cm_common.c b/arch/arm/mach-omap2/cm_common.c index c334d38..9a53eb5 100644 --- a/arch/arm/mach-omap2/cm_common.c +++ b/arch/arm/mach-omap2/cm_common.c @@ -16,7 +16,7 @@ #include #include -#include "cm2xxx.h" +#include #include "cm3xxx.h" #include "cm44xx.h" diff --git a/include/linux/power/omap/cm2xxx.h b/include/linux/power/omap/cm2xxx.h new file mode 100644 index 0000000..df496b4 --- /dev/null +++ b/include/linux/power/omap/cm2xxx.h @@ -0,0 +1,70 @@ +/* + * OMAP2xxx Clock Management (CM) register definitions + * + * Copyright (C) 2007-2009, 2012 Texas Instruments, Inc. + * Copyright (C) 2007-2010 Nokia Corporation + * Paul Walmsley + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * The CM hardware modules on the OMAP2/3 are quite similar to each + * other. The CM modules/instances on OMAP4 are quite different, so + * they are handled in a separate file. + */ +#ifndef __LINUX_POWER_OMAP_CM2XXX_H +#define __LINUX_POWER_OMAP_CM2XXX_H + +/* + * Module specific CM register offsets from CM_BASE + domain offset + * Use cm_{read,write}_mod_reg() with these registers. + * These register offsets generally appear in more than one PRCM submodule. + */ + +/* OMAP2-specific register offsets */ + +#define OMAP24XX_CM_FCLKEN2 0x0004 +#define OMAP24XX_CM_ICLKEN4 0x001c +#define OMAP24XX_CM_AUTOIDLE4 0x003c +#define OMAP24XX_CM_IDLEST4 0x002c + +/* CM_IDLEST bit field values to indicate deasserted IdleReq */ + +#define OMAP24XX_CM_IDLEST_VAL 0 + + +/* Clock management domain register get/set */ + +#ifndef __ASSEMBLER__ + +void omap2xxx_cm_clkdm_enable_hwsup(s16 module, u32 mask); +void omap2xxx_cm_clkdm_disable_hwsup(s16 module, u32 mask); + +void omap2xxx_cm_set_dpll_disable_autoidle(void); +void omap2xxx_cm_set_dpll_auto_low_power_stop(void); + +void omap2xxx_cm_set_apll54_disable_autoidle(void); +void omap2xxx_cm_set_apll54_auto_low_power_stop(void); +void omap2xxx_cm_set_apll96_disable_autoidle(void); +void omap2xxx_cm_set_apll96_auto_low_power_stop(void); + +bool omap2xxx_cm_is_clkdm_in_hwsup(s16 module, u32 mask); +int omap2xxx_cm_wait_module_ready(s16 prcm_mod, u8 idlest_id, + u8 idlest_shift); +int omap2xxx_cm_split_idlest_reg(void __iomem *idlest_reg, + s16 *prcm_inst, u8 *idlest_reg_id); +int omap2xxx_cm_fclks_active(void); +int omap2xxx_cm_mpu_retention_allowed(void); +u32 omap2xxx_cm_get_core_clk_src(void); +u32 omap2xxx_cm_get_core_pll_config(void); +u32 omap2xxx_cm_get_pll_config(void); +u32 omap2xxx_cm_get_pll_status(void); +void omap2xxx_cm_set_mod_dividers(u32 mpu, u32 dsp, u32 gfx, u32 core, + u32 mdm); + +int __init omap2xxx_cm_init(void); + +#endif + +#endif